| /drivers/gpu/drm/msm/adreno/ |
| D | adreno_common.xml.h | 98 ENDIAN_8IN32 = 2, enumerator
|
| /drivers/gpu/drm/amd/include/asic_reg/bif/ |
| D | bif_5_1_enum.h | 520 ENDIAN_8IN32 = 0x2, enumerator
|
| D | bif_5_0_enum.h | 30 ENDIAN_8IN32 = 0x2, enumerator
|
| /drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| D | gmc_8_2_enum.h | 520 ENDIAN_8IN32 = 0x2, enumerator
|
| D | gmc_8_1_enum.h | 30 ENDIAN_8IN32 = 0x2, enumerator
|
| /drivers/gpu/drm/amd/include/asic_reg/smu/ |
| D | smu_8_0_enum.h | 520 ENDIAN_8IN32 = 0x2, enumerator
|
| D | smu_7_1_0_enum.h | 73 ENDIAN_8IN32 = 0x2, enumerator
|
| D | smu_7_1_3_enum.h | 77 ENDIAN_8IN32 = 0x2, enumerator
|
| D | smu_7_1_1_enum.h | 80 ENDIAN_8IN32 = 0x2, enumerator
|
| D | smu_7_1_2_enum.h | 80 ENDIAN_8IN32 = 0x2, enumerator
|
| /drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| D | uvd_6_0_enum.h | 533 ENDIAN_8IN32 = 0x2, enumerator
|
| D | uvd_5_0_enum.h | 43 ENDIAN_8IN32 = 0x2, enumerator
|
| /drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_2_4_enum.h | 215 ENDIAN_8IN32 = 0x2, enumerator
|
| D | oss_3_0_enum.h | 329 ENDIAN_8IN32 = 0x2, enumerator
|
| D | oss_3_0_1_enum.h | 916 ENDIAN_8IN32 = 0x2, enumerator
|
| /drivers/gpu/drm/amd/include/asic_reg/dce/ |
| D | dce_10_0_enum.h | 605 ENDIAN_8IN32 = 0x2, enumerator
|
| D | dce_11_0_enum.h | 5092 ENDIAN_8IN32 = 0x2, enumerator
|
| /drivers/gpu/drm/amd/amdgpu/ |
| D | dce_v10_0.c | 2133 ENDIAN_8IN32); in dce_v10_0_crtc_do_set_base()
2142 ENDIAN_8IN32); in dce_v10_0_crtc_do_set_base()
2153 ENDIAN_8IN32); in dce_v10_0_crtc_do_set_base()
|
| D | dce_v11_0.c | 2121 ENDIAN_8IN32); in dce_v11_0_crtc_do_set_base()
2130 ENDIAN_8IN32); in dce_v11_0_crtc_do_set_base()
2141 ENDIAN_8IN32); in dce_v11_0_crtc_do_set_base()
|
| /drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_7_2_enum.h | 5156 ENDIAN_8IN32 = 0x2, enumerator
|
| D | gfx_8_0_enum.h | 5690 ENDIAN_8IN32 = 0x2, enumerator
|
| D | gfx_8_1_enum.h | 6249 ENDIAN_8IN32 = 0x2, enumerator
|