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Searched refs:EXT_INT_ENAB (Results 1 – 13 of 13) sorted by relevance

/drivers/net/hamradio/
Ddmascc.c527 write_scc(priv, R1, EXT_INT_ENAB); in setup_adapter()
759 write_scc(priv, R1, EXT_INT_ENAB | WT_FN_RDYFN); in scc_open()
997 EXT_INT_ENAB | WT_FN_RDYFN | in tx_on()
1009 EXT_INT_ENAB | WT_FN_RDYFN | TxINT_ENAB); in tx_on()
1042 write_scc(priv, R1, EXT_INT_ENAB | INT_ERR_Rx | in rx_on()
1048 write_scc(priv, R1, EXT_INT_ENAB | INT_ALL_Rx | WT_RDY_RT | in rx_on()
1064 write_scc(priv, R1, EXT_INT_ENAB | WT_FN_RDYFN); in rx_off()
1344 write_scc(priv, R1, EXT_INT_ENAB | WT_FN_RDYFN); in es_isr()
Dz8530.h38 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dscc.c876 or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */ in init_channel()
/drivers/tty/serial/
Dzs.c470 zport_a->regs[1] &= ~EXT_INT_ENAB; in zs_stop_rx()
476 zport->regs[1] &= ~EXT_INT_ENAB; in zs_stop_rx()
480 zport->regs[1] &= ~EXT_INT_ENAB; in zs_stop_rx()
500 if (!(zport_a->regs[1] & EXT_INT_ENAB)) in zs_enable_ms()
504 zport_a->regs[1] |= EXT_INT_ENAB; in zs_enable_ms()
784 if (!(zport->regs[1] & EXT_INT_ENAB)) in zs_startup()
789 zport->regs[1] |= RxINT_ALL | TxINT_ENAB | EXT_INT_ENAB; in zs_startup()
Dzs.h90 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dip22zilog.h70 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dsunzilog.h62 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dip22zilog.c181 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); in __load_zsregs()
731 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __ip22zilog_startup()
792 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in ip22zilog_shutdown()
1140 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in ip22zilog_prepare()
Dsunzilog.c200 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); in __load_zsregs()
796 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __sunzilog_startup()
857 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in sunzilog_shutdown()
1350 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in sunzilog_init_hw()
1366 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in sunzilog_init_hw()
Dpmac_zilog.h159 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dpmac_zilog.c149 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); in pmz_load_zsregs()
225 uap->curregs[1] |= EXT_INT_ENAB; in pmz_interrupt_control()
227 uap->curregs[1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in pmz_interrupt_control()
/drivers/net/wan/
Dz85230.h59 #define EXT_INT_ENAB 0x1 /* Ext Int Enable */ macro
Dz85230.c230 1, EXT_INT_ENAB|TxINT_ENAB|INT_ALL_Rx,
255 1, EXT_INT_ENAB|TxINT_ENAB|INT_ALL_Rx,