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Searched refs:FLD_VAL (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/gma500/
Dtc35876x-dsi-lvds.c38 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) macro
210 (FLD_VAL(lvmx03, 29, 24) | FLD_VAL(lvmx02, 20, 16) | \
211 FLD_VAL(lvmx01, 12, 8) | FLD_VAL(lvmx00, 4, 0))
362 tc35876x_regw(i2c, PPI_TX_RX_TA, FLD_VAL(txtagocnt, 26, 16) | in tc35876x_configure_lvds_bridge()
363 FLD_VAL(txtasurecnt, 10, 0)); in tc35876x_configure_lvds_bridge()
364 tc35876x_regw(i2c, PPI_LPTXTIMECNT, FLD_VAL(ppi_lptxtimecnt, 10, 0)); in tc35876x_configure_lvds_bridge()
366 tc35876x_regw(i2c, PPI_D0S_CLRSIPOCOUNT, FLD_VAL(1, 5, 0)); in tc35876x_configure_lvds_bridge()
367 tc35876x_regw(i2c, PPI_D1S_CLRSIPOCOUNT, FLD_VAL(1, 5, 0)); in tc35876x_configure_lvds_bridge()
368 tc35876x_regw(i2c, PPI_D2S_CLRSIPOCOUNT, FLD_VAL(1, 5, 0)); in tc35876x_configure_lvds_bridge()
369 tc35876x_regw(i2c, PPI_D3S_CLRSIPOCOUNT, FLD_VAL(1, 5, 0)); in tc35876x_configure_lvds_bridge()
[all …]
Dmdfld_dsi_pkg_sender.c233 val = FLD_VAL(param, 23, 16) | FLD_VAL(cmd, 15, 8) | in send_short_pkg()
234 FLD_VAL(virtual_channel, 7, 6) | FLD_VAL(data_type, 5, 0); in send_short_pkg()
297 val = FLD_VAL(len, 23, 8) | FLD_VAL(virtual_channel, 7, 6) | in send_long_pkg()
298 FLD_VAL(data_type, 5, 0); in send_long_pkg()
Dmdfld_dsi_output.h45 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) macro
48 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
/drivers/video/fbdev/omap2/dss/
Dhdmi_wp.c140 l |= FLD_VAL(video_fmt->y_res, 31, 16); in hdmi_wp_video_config_format()
141 l |= FLD_VAL(video_fmt->x_res, 15, 0); in hdmi_wp_video_config_format()
171 timing_h |= FLD_VAL(timings->hbp, 31, 20); in hdmi_wp_video_config_timing()
172 timing_h |= FLD_VAL(timings->hfp, 19, 8); in hdmi_wp_video_config_timing()
173 timing_h |= FLD_VAL(timings->hsw, 7, 0); in hdmi_wp_video_config_timing()
176 timing_v |= FLD_VAL(timings->vbp, 31, 20); in hdmi_wp_video_config_timing()
177 timing_v |= FLD_VAL(timings->vfp, 19, 8); in hdmi_wp_video_config_timing()
178 timing_v |= FLD_VAL(timings->vsw, 7, 0); in hdmi_wp_video_config_timing()
Ddispc.c657 h = FLD_VAL(h_coef[i].hc0_vc00, 7, 0) in dispc_ovl_set_scale_coef()
658 | FLD_VAL(h_coef[i].hc1_vc0, 15, 8) in dispc_ovl_set_scale_coef()
659 | FLD_VAL(h_coef[i].hc2_vc1, 23, 16) in dispc_ovl_set_scale_coef()
660 | FLD_VAL(h_coef[i].hc3_vc2, 31, 24); in dispc_ovl_set_scale_coef()
661 hv = FLD_VAL(h_coef[i].hc4_vc22, 7, 0) in dispc_ovl_set_scale_coef()
662 | FLD_VAL(v_coef[i].hc1_vc0, 15, 8) in dispc_ovl_set_scale_coef()
663 | FLD_VAL(v_coef[i].hc2_vc1, 23, 16) in dispc_ovl_set_scale_coef()
664 | FLD_VAL(v_coef[i].hc3_vc2, 31, 24); in dispc_ovl_set_scale_coef()
679 v = FLD_VAL(v_coef[i].hc0_vc00, 7, 0) in dispc_ovl_set_scale_coef()
680 | FLD_VAL(v_coef[i].hc4_vc22, 15, 8); in dispc_ovl_set_scale_coef()
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Drfbi.c733 l |= FLD_VAL(parallelmode, 1, 0); in rfbi_configure_bus()
734 l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */ in rfbi_configure_bus()
735 l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */ in rfbi_configure_bus()
736 l |= FLD_VAL(datatype, 6, 5); in rfbi_configure_bus()
738 l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */ in rfbi_configure_bus()
739 l |= FLD_VAL(cycleformat, 10, 9); in rfbi_configure_bus()
740 l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */ in rfbi_configure_bus()
741 l |= FLD_VAL(0, 16, 16); /* A0POLARITY */ in rfbi_configure_bus()
742 l |= FLD_VAL(0, 17, 17); /* REPOLARITY */ in rfbi_configure_bus()
743 l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */ in rfbi_configure_bus()
[all …]
Ddss.h71 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) macro
74 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
Ddsi.c2232 v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); in dsi_config_tx_fifo()
2265 v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); in dsi_config_rx_fifo()
2683 val = FLD_VAL(data_id, 7, 0) | FLD_VAL(len, 23, 8) | in dsi_vc_write_long_header()
2684 FLD_VAL(ecc, 31, 24); in dsi_vc_write_long_header()
3702 r = FLD_VAL(enter_hs_mode_lat, 31, 16) | in dsi_proto_timings()
3703 FLD_VAL(exit_hs_mode_lat, 15, 0); in dsi_proto_timings()
3957 l = FLD_VAL(total_len, 23, 0); /* TE_SIZE */ in dsi_update_screen_dispc()
/drivers/crypto/
Domap-aes.c48 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end)) macro
275 val = FLD_VAL(((dd->ctx->keylen >> 3) - 1), 4, 3); in omap_aes_write_ctrl()