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Searched refs:GRBM_GFX_INDEX (Results 1 – 17 of 17) sorted by relevance

/drivers/gpu/drm/amd/amdkfd/
Dcik_regs.h68 #define GRBM_GFX_INDEX 0x30800 macro
Dkfd_dbgdev.c683 GRBM_GFX_INDEX / (sizeof(uint32_t)) - in dbgdev_wave_control_diq()
709 GRBM_GFX_INDEX / (sizeof(uint32_t)) - in dbgdev_wave_control_diq()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v8.c466 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
468 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
470 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, in kgd_wave_control_execute()
Dgfx_v8_0.c2742 u32 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
2745 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
2746 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
2748 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v8_0_select_se_sh()
2749 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
2751 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
2752 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v8_0_select_se_sh()
2754 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); in gfx_v8_0_select_se_sh()
2755 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v8_0_select_se_sh()
/drivers/gpu/drm/radeon/
Dradeon_kfd.c767 write_register(kgd, GRBM_GFX_INDEX, gfx_index_val); in kgd_wave_control_execute()
775 write_register(kgd, GRBM_GFX_INDEX, data); in kgd_wave_control_execute()
Dcypress_dpm.c126 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_gfx_clock_gating_enable()
153 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_gfx_clock_gating_enable()
187 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_mg_clock_gating_enable()
208 WREG32(GRBM_GFX_INDEX, 0xC0000000); in cypress_mg_clock_gating_enable()
Dni.c1100 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1120 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1129 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in cayman_gpu_init()
Dnid.h295 #define GRBM_GFX_INDEX 0x802C macro
Dsid.h998 #define GRBM_GFX_INDEX 0x802C macro
Dcikd.h1629 #define GRBM_GFX_INDEX 0x30800 macro
Devergreen.c3554 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3575 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3584 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in evergreen_gpu_init()
Devergreend.h412 #define GRBM_GFX_INDEX 0x802C macro
Dsi.c2961 WREG32(GRBM_GFX_INDEX, data); in si_select_se_sh()
4411 case GRBM_GFX_INDEX: in si_vm_reg_valid()
Devergreen_cs.c3184 case GRBM_GFX_INDEX: in evergreen_vm_reg_valid()
Dcik.c3422 WREG32(GRBM_GFX_INDEX, data); in cik_select_se_sh()
/drivers/gpu/drm/radeon/reg_srcs/
Dcayman2 0x0000802C GRBM_GFX_INDEX
Devergreen2 0x0000802C GRBM_GFX_INDEX