Searched refs:HCLK (Results 1 – 7 of 7) sorted by relevance
/drivers/clk/samsung/ |
D | clk-s3c2410.c | 150 ALIAS(HCLK, NULL, "hclk"), 204 DIV(HCLK, "hclk", "mpll", CLKDIVN, 1, 1), 273 MUX(HCLK, "hclk", hclk_p, CLKDIVN, 1, 2),
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D | clk-s3c2412.c | 110 DIV(HCLK, "hclk", "armdiv", CLKDIVN, 0, 2), 202 ALIAS(HCLK, NULL, "hclk"),
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D | clk-s3c2443.c | 147 DIV_T(HCLK, "hclk", "prediv", CLKDIV0, 0, 2, hclk_d), 192 ALIAS(HCLK, NULL, "hclk"),
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D | clk-s3c64xx.c | 229 DIV(HCLK, "hclk", "hclkx2", CLK_DIV0, 8, 1), 383 ALIAS(HCLK, NULL, "hclk"),
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/drivers/mmc/host/ |
D | toshsd.c | 89 while (ios->clock < HCLK / div) in __toshsd_set_ios() 645 mmc->f_min = HCLK / 512; in toshsd_probe() 646 mmc->f_max = HCLK; in toshsd_probe()
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D | toshsd.h | 15 #define HCLK 33000000 /* 33 MHz (PCI clock) */ macro
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/drivers/video/fbdev/kyro/ |
D | fbdev.c | 506 par->HCLK = (1000000000 + (lineclock / 2)) / lineclock; in kyrofb_set_par()
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