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Searched refs:HCLK (Results 1 – 7 of 7) sorted by relevance

/drivers/clk/samsung/
Dclk-s3c2410.c150 ALIAS(HCLK, NULL, "hclk"),
204 DIV(HCLK, "hclk", "mpll", CLKDIVN, 1, 1),
273 MUX(HCLK, "hclk", hclk_p, CLKDIVN, 1, 2),
Dclk-s3c2412.c110 DIV(HCLK, "hclk", "armdiv", CLKDIVN, 0, 2),
202 ALIAS(HCLK, NULL, "hclk"),
Dclk-s3c2443.c147 DIV_T(HCLK, "hclk", "prediv", CLKDIV0, 0, 2, hclk_d),
192 ALIAS(HCLK, NULL, "hclk"),
Dclk-s3c64xx.c229 DIV(HCLK, "hclk", "hclkx2", CLK_DIV0, 8, 1),
383 ALIAS(HCLK, NULL, "hclk"),
/drivers/mmc/host/
Dtoshsd.c89 while (ios->clock < HCLK / div) in __toshsd_set_ios()
645 mmc->f_min = HCLK / 512; in toshsd_probe()
646 mmc->f_max = HCLK; in toshsd_probe()
Dtoshsd.h15 #define HCLK 33000000 /* 33 MHz (PCI clock) */ macro
/drivers/video/fbdev/kyro/
Dfbdev.c506 par->HCLK = (1000000000 + (lineclock / 2)) / lineclock; in kyrofb_set_par()