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Searched refs:MC_PMG_CMD_EMRS (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/radeon/
Dbtcd.h125 #define MC_PMG_CMD_EMRS 0x2a0c macro
Dbtc_dpm.c1884 case MC_PMG_CMD_EMRS >> 2: in btc_check_s0_mc_reg_index()
1926 tmp = RREG32(MC_PMG_CMD_EMRS); in btc_set_mc_special_registers()
1927 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in btc_set_mc_special_registers()
2038 WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS)); in btc_initialize_mc_reg_table()
Dnid.h796 #define MC_PMG_CMD_EMRS 0x2a0c macro
Dni_dpm.c2721 temp_reg = RREG32(MC_PMG_CMD_EMRS); in ni_set_mc_special_registers()
2722 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in ni_set_mc_special_registers()
2797 case MC_PMG_CMD_EMRS >> 2: in ni_check_s0_mc_reg_index()
2887 WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS)); in ni_initialize_mc_reg_table()
Dsid.h563 #define MC_PMG_CMD_EMRS 0x2a0c macro
Dcikd.h690 #define MC_PMG_CMD_EMRS 0x2a0c macro
Dsi_dpm.c5418 temp_reg = RREG32(MC_PMG_CMD_EMRS); in si_set_mc_special_registers()
5419 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in si_set_mc_special_registers()
5505 case MC_PMG_CMD_EMRS >> 2: in si_check_s0_mc_reg_index()
5599 WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS)); in si_initialize_mc_reg_table()
Dci_dpm.c4321 temp_reg = RREG32(MC_PMG_CMD_EMRS); in ci_set_mc_special_registers()
4322 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in ci_set_mc_special_registers()
4427 case MC_PMG_CMD_EMRS >> 2: in ci_check_s0_mc_reg_index()
4619 WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS)); in ci_initialize_mc_reg_table()
Devergreend.h301 #define MC_PMG_CMD_EMRS 0x2a0c macro
Dcypress_dpm.c1004 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_EMRS >> 2; in cypress_set_mc_reg_address_table()