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Searched refs:MC_SEQ_WR_CTL_D0_LP (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/radeon/
Dbtcd.h151 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
Dbtc_dpm.c1879 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in btc_check_s0_mc_reg_index()
2036 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in btc_initialize_mc_reg_table()
Dnid.h809 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
Dsid.h577 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
Dcikd.h704 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
Devergreend.h327 #define MC_SEQ_WR_CTL_D0_LP 0x2a7c macro
Dni_dpm.c2792 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in ni_check_s0_mc_reg_index()
2890 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in ni_initialize_mc_reg_table()
Dcypress_dpm.c995 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_WR_CTL_D0_LP >> 2; in cypress_set_mc_reg_address_table()
Dsi_dpm.c5500 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in si_check_s0_mc_reg_index()
5602 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in si_initialize_mc_reg_table()
Dci_dpm.c4422 *out_reg = MC_SEQ_WR_CTL_D0_LP >> 2; in ci_check_s0_mc_reg_index()
4622 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in ci_initialize_mc_reg_table()