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Searched refs:MT76_GET (Results 1 – 6 of 6) sorted by relevance

/drivers/net/wireless/mediatek/mt7601u/
Dmac.c22 u8 idx = MT76_GET(MT_TXWI_RATE_MCS, rate); in mt76_mac_process_tx_rate()
28 switch (MT76_GET(MT_TXWI_RATE_PHY_MODE, rate)) { in mt76_mac_process_tx_rate()
50 if (MT76_GET(MT_TXWI_RATE_BW, rate) == MT_PHY_BW_40) in mt76_mac_process_tx_rate()
159 stat.pktid = MT76_GET(MT_TX_STAT_FIFO_PID_TYPE, val); in mt7601u_mac_fetch_tx_status()
160 stat.wcid = MT76_GET(MT_TX_STAT_FIFO_WCID, val); in mt7601u_mac_fetch_tx_status()
161 stat.rate = MT76_GET(MT_TX_STAT_FIFO_RATE, val); in mt7601u_mac_fetch_tx_status()
391 u8 idx = MT76_GET(MT_RXWI_RATE_MCS, rate); in mt76_mac_process_rate()
393 switch (MT76_GET(MT_RXWI_RATE_PHY, rate)) { in mt76_mac_process_rate()
439 dev->bcn_phy_mode = MT76_GET(MT_RXWI_RATE_PHY, rate); in mt7601u_rx_monitor_beacon()
461 len = MT76_GET(MT_RXWI_CTL_MPDU_LEN, ctl); in mt76_mac_process_rx()
Dphy.c85 if (MT76_GET(MT_RF_CSR_CFG_REG_ID, val) == offset && in mt7601u_rf_rr()
86 MT76_GET(MT_RF_CSR_CFG_REG_BANK, val) == bank) { in mt7601u_rf_rr()
87 ret = MT76_GET(MT_RF_CSR_CFG_DATA, val); in mt7601u_rf_rr()
174 if (MT76_GET(MT_BBP_CSR_CFG_REG_NUM, val) == offset) { in mt7601u_bbp_rr()
175 ret = MT76_GET(MT_BBP_CSR_CFG_VAL, val); in mt7601u_bbp_rr()
252 int bw = MT76_GET(MT_RXWI_RATE_BW, rate); in mt7601u_phy_get_rssi()
253 int aux_lna = MT76_GET(MT_RXWI_ANT_AUX_LNA, rxwi->ant); in mt7601u_phy_get_rssi()
254 int lna_id = MT76_GET(MT_RXWI_GAIN_RSSI_LNA_ID, rxwi->gain); in mt7601u_phy_get_rssi()
262 val -= MT76_GET(MT_RXWI_GAIN_RSSI_VAL, rxwi->gain); in mt7601u_phy_get_rssi()
942 curr_pwr = s6_to_int(MT76_GET(MT_TX_ALC_CFG_1_TEMP_COMP, val)); in mt7601u_tssi_cal()
Dmcu.c105 if (MT76_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce) == seq && in mt7601u_mcu_wait_resp()
106 MT76_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce) == CMD_DONE) in mt7601u_mcu_wait_resp()
110 MT76_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce), in mt7601u_mcu_wait_resp()
111 seq, MT76_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce)); in mt7601u_mcu_wait_resp()
Deeprom.c131 if (MT76_GET(MT_EE_NIC_CONF_0_RX_PATH, nic_conf0) > 1 || in mt7601u_set_chip_cap()
132 MT76_GET(MT_EE_NIC_CONF_0_TX_PATH, nic_conf0) > 1) in mt7601u_set_chip_cap()
179 max_pwr = MT76_GET(MT_TX_ALC_CFG_0_LIMIT_0, val); in mt7601u_set_channel_power()
Dutil.h71 #define MT76_GET(_mask, _val) \ macro
Ddma.c106 if (unlikely(MT76_GET(MT_RXD_INFO_TYPE, fce_info))) in mt7601u_rx_process_seg()