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Searched refs:NI_DCIO_UNIPHY0_PLL_CONTROL1 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/radeon/
Devergreen_reg.h312 #define NI_DCIO_UNIPHY0_PLL_CONTROL1 0x6618 macro
Devergreen.c2691 uniphy_pll = RREG32(NI_DCIO_UNIPHY0_PLL_CONTROL1 + in evergreen_is_dp_sst_stream_enabled()