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Searched refs:OWN (Results 1 – 16 of 16) sorted by relevance

/drivers/staging/rtl8192e/rtl8192e/
Dr8190P_def.h223 u8 OWN:1; member
262 u8 OWN:1; member
288 u8 OWN:1; member
Drtl_core.c557 pdesc->OWN = 1; in _rtl92e_prepare_beacon()
1689 if (entry->OWN) in _rtl92e_tx_isr()
1780 if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) { in _rtl92e_tx()
1795 pdesc->OWN = 1; in _rtl92e_tx()
1842 entry->OWN = 1; in _rtl92e_alloc_rx_ring()
1917 entry->OWN = 1; in rtl92e_reset_desc_ring()
2051 if (pdesc->OWN) in _rtl92e_rx_normal()
2120 pdesc->OWN = 1; in _rtl92e_rx_normal()
Dr8192E_dev.c1325 entry->OWN = 1; in rtl92e_fill_tx_cmd_desc()
/drivers/staging/rtl8712/
Drtl8712_xmit.h64 #define OWN BIT(31) macro
Drtl8712_xmit.c271 ptx_desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in r8712_construct_txaggr_cmd_desc()
462 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in update_txdesc()
Drtl8712_cmd.c367 pdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in r8712_cmd_thread()
/drivers/staging/rtl8188eu/include/
Drtl8188e_xmit.h64 #define OWN BIT(31) macro
/drivers/staging/rtl8192u/
Dr8192U.h188 u8 OWN:1; member
238 u8 OWN:1; member
253 u8 OWN:1; member
Dr8192U_core.c1344 pdesc->OWN = 1; in rtl819xU_tx_cmd()
1666 tx_desc->OWN = 1; in rtl8192_tx()
/drivers/staging/rtl8723au/include/
Drtl8723a_xmit.h42 #define OWN BIT(31) macro
/drivers/net/ethernet/sis/
Dsis900.h197 OWN = 0x80000000, MORE = 0x40000000, INTR = 0x20000000, enumerator
Dsis900.c1622 sis_priv->tx_ring[entry].cmdsts = (OWN | INTR | skb->len); in sis900_start_xmit()
1741 while (rx_status & OWN) { in sis900_rx()
1898 if (tx_status & OWN) { in sis900_finish_xmit()
/drivers/staging/rtl8188eu/hal/
Drtl8188eu_xmit.c75 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */ in rtl8188e_fill_fake_txdesc()
199 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in update_txdesc()
/drivers/net/ethernet/amd/xgbe/
Dxgbe-dev.c930 return !XGMAC_GET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN); in xgbe_tx_complete()
1148 XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN, 1); in xgbe_rx_desc_reset()
1521 XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); in xgbe_dev_xmit()
1560 XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); in xgbe_dev_xmit()
1591 XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, OWN, 1); in xgbe_dev_xmit()
1631 if (XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN)) in xgbe_dev_read()
/drivers/staging/rtl8723au/hal/
Drtl8723au_xmit.c269 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in update_txdesc()
Drtl8723a_hal_init.c1854 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); in rtl8723a_fill_fake_txdesc()