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Searched refs:PIPEACONF (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/gma500/
Doaktrail_device.c208 p->conf = PSB_RVDC32(PIPEACONF); in oaktrail_save_display_registers()
287 PSB_WVDC32(0x0, PIPEACONF); in oaktrail_save_display_registers()
347 PSB_WVDC32(p->conf, PIPEACONF); in oaktrail_restore_display_registers()
468 .conf = PIPEACONF,
Dpsb_irq.c77 return PIPEACONF; in mid_pipeconf()
619 uint32_t pipeconf_reg = PIPEACONF; in psb_get_vblank_counter()
Dpsb_device.c267 .conf = PIPEACONF,
Dmdfld_intel_display.c278 !((REG_READ(PIPEACONF) | REG_READ(PIPECCONF)) in mdfld_disable_crtc()
463 if ((pipe != 1 && !((REG_READ(PIPEACONF) in mdfld_crtc_dpms()
Dmdfld_dsi_dpi.c120 u32 pipeconf_reg = PIPEACONF; in dsi_set_pipe_plane_enable_state()
824 u32 pipeconf_reg = PIPEACONF; in mdfld_dsi_dpi_mode_set()
Dmdfld_device.c452 .conf = PIPEACONF,
Dcdv_device.c529 .conf = PIPEACONF,
Dpsb_intel_reg.h491 #define PIPEACONF 0x70008 macro
Doaktrail_hdmi.c278 int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF; in oaktrail_crtc_hdmi_mode_set()
/drivers/video/fbdev/intelfb/
Dintelfbhw.h281 #define PIPEACONF 0x70008 macro
Dintelfbhw.c585 hw->pipe_a_conf = INREG(PIPEACONF); in intelfbhw_read_hw_state()
1344 pipe_conf_reg = PIPEACONF; in intelfbhw_program_mode()