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Searched refs:PSB_WVDC32 (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/gma500/
Doaktrail_device.c272 PSB_WVDC32(0, PP_CONTROL); in oaktrail_save_display_registers()
279 PSB_WVDC32(0x58000000, DSPACNTR); in oaktrail_save_display_registers()
281 PSB_WVDC32(0, DSPASURF); in oaktrail_save_display_registers()
287 PSB_WVDC32(0x0, PIPEACONF); in oaktrail_save_display_registers()
292 PSB_WVDC32(0, MRST_DPLL_A); in oaktrail_save_display_registers()
312 PSB_WVDC32(regs->psb.saveDSPARB, DSPARB); in oaktrail_restore_display_registers()
313 PSB_WVDC32(regs->psb.saveDSPFW1, DSPFW1); in oaktrail_restore_display_registers()
314 PSB_WVDC32(regs->psb.saveDSPFW2, DSPFW2); in oaktrail_restore_display_registers()
315 PSB_WVDC32(regs->psb.saveDSPFW3, DSPFW3); in oaktrail_restore_display_registers()
316 PSB_WVDC32(regs->psb.saveDSPFW4, DSPFW4); in oaktrail_restore_display_registers()
[all …]
Dmdfld_device.c280 PSB_WVDC32(0x80000000, VGACNTRL); in mdfld_restore_display_registers()
283 PSB_WVDC32(dpll_val & ~DPLL_VCO_ENABLE, map->dpll); in mdfld_restore_display_registers()
286 PSB_WVDC32(pipe->fp0, map->fp0); in mdfld_restore_display_registers()
297 PSB_WVDC32(dpll, map->dpll); in mdfld_restore_display_registers()
302 PSB_WVDC32(pipe->fp0, map->fp0); in mdfld_restore_display_registers()
303 PSB_WVDC32(dpll_val, map->dpll); in mdfld_restore_display_registers()
308 PSB_WVDC32(dpll_val, map->dpll); in mdfld_restore_display_registers()
326 PSB_WVDC32(pipe->htotal, map->htotal); in mdfld_restore_display_registers()
327 PSB_WVDC32(pipe->hblank, map->hblank); in mdfld_restore_display_registers()
328 PSB_WVDC32(pipe->hsync, map->hsync); in mdfld_restore_display_registers()
[all …]
Dpsb_irq.c95 PSB_WVDC32(writeVal, reg); in psb_enable_pipestat()
111 PSB_WVDC32(writeVal, reg); in psb_disable_pipestat()
123 PSB_WVDC32(~dev_priv->vdc_irq_mask, PSB_INT_MASK_R); in mid_enable_pipe_event()
124 PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R); in mid_enable_pipe_event()
135 PSB_WVDC32(~dev_priv->vdc_irq_mask, PSB_INT_MASK_R); in mid_disable_pipe_event()
136 PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R); in mid_disable_pipe_event()
169 PSB_WVDC32(PSB_RVDC32(pipe_stat_reg), pipe_stat_reg); in mid_pipe_event_handler()
302 PSB_WVDC32(vdc_stat, PSB_INT_IDENTITY_R); in psb_irq_handler()
321 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); in psb_irq_preinstall()
322 PSB_WVDC32(0x00000000, PSB_INT_MASK_R); in psb_irq_preinstall()
[all …]
Doaktrail_hdmi.c814 PSB_WVDC32(hdmi_dev->saveDPLL_CTRL, DPLL_CTRL); in oaktrail_hdmi_restore()
815 PSB_WVDC32(hdmi_dev->saveDPLL_DIV_CTRL, DPLL_DIV_CTRL); in oaktrail_hdmi_restore()
816 PSB_WVDC32(hdmi_dev->saveDPLL_ADJUST, DPLL_ADJUST); in oaktrail_hdmi_restore()
817 PSB_WVDC32(hdmi_dev->saveDPLL_UPDATE, DPLL_UPDATE); in oaktrail_hdmi_restore()
818 PSB_WVDC32(hdmi_dev->saveDPLL_CLK_ENABLE, DPLL_CLK_ENABLE); in oaktrail_hdmi_restore()
822 PSB_WVDC32(pipeb->src, PIPEBSRC); in oaktrail_hdmi_restore()
823 PSB_WVDC32(pipeb->htotal, HTOTAL_B); in oaktrail_hdmi_restore()
824 PSB_WVDC32(pipeb->hblank, HBLANK_B); in oaktrail_hdmi_restore()
825 PSB_WVDC32(pipeb->hsync, HSYNC_B); in oaktrail_hdmi_restore()
826 PSB_WVDC32(pipeb->vtotal, VTOTAL_B); in oaktrail_hdmi_restore()
[all …]
Dpsb_device.c226 PSB_WVDC32(regs->saveDSPARB, DSPARB); in psb_restore_display_registers()
227 PSB_WVDC32(regs->saveDSPFW1, DSPFW1); in psb_restore_display_registers()
228 PSB_WVDC32(regs->saveDSPFW2, DSPFW2); in psb_restore_display_registers()
229 PSB_WVDC32(regs->saveDSPFW3, DSPFW3); in psb_restore_display_registers()
230 PSB_WVDC32(regs->saveDSPFW4, DSPFW4); in psb_restore_display_registers()
231 PSB_WVDC32(regs->saveDSPFW5, DSPFW5); in psb_restore_display_registers()
232 PSB_WVDC32(regs->saveDSPFW6, DSPFW6); in psb_restore_display_registers()
233 PSB_WVDC32(regs->saveCHICKENBIT, DSPCHICKENBIT); in psb_restore_display_registers()
236 PSB_WVDC32(0x80000000, VGACNTRL); in psb_restore_display_registers()
Dpsb_drv.c372 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); in psb_driver_load()
373 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R); in psb_driver_load()
374 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R); in psb_driver_load()
Dgtt.c407 PSB_WVDC32(dev_priv->pge_ctl, PSB_PGETBL_CTL); in psb_gtt_takedown()
439 PSB_WVDC32(dev_priv->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL); in psb_gtt_init()
Dpower.c110 PSB_WVDC32(dev_priv->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL); in gma_resume_display()
Dpsb_drv.h901 #define PSB_WVDC32(_val, _offs) iowrite32(_val, dev_priv->vdc_reg + (_offs)) macro