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Searched refs:REQ (Results 1 – 8 of 8) sorted by relevance

/drivers/isdn/hardware/eicon/
Dpr_pc.h54 } REQ; typedef
Ddi.c86 REQ *ReqOut; in pr_out()
125 ReqOut = (REQ *)&PR_RAM->B[a->ram_inw(a, &PR_RAM->NextReq)]; in pr_out()
/drivers/gpu/drm/radeon/
Dsumod.h310 # define REQ (1 << 0) macro
Dcikd.h1479 #define REQ 0x00000001 macro
Dcik.c6251 tmp = REQ | MESSAGE(MSG_ENTER_RLC_SAFE_MODE); in cik_enter_rlc_safe_mode()
6262 if ((RREG32(RLC_GPR_REG2) & REQ) == 0) in cik_enter_rlc_safe_mode()
6272 tmp = REQ | MESSAGE(MSG_EXIT_RLC_SAFE_MODE); in cik_exit_rlc_safe_mode()
/drivers/scsi/aic7xxx/
Daic79xx.seq846 * target to assert REQ before checking MSG, C/D and I/O for
913 * 800ns dead time between command phase and the REQ
1394 * Don't ignore persistent REQ assertions just because
1398 * count REQ while we are waiting for it to fall during
1400 * sequencer instruction takes ~25ns, so the REQ must
1402 * REQ.
1429 * and that REQ is already set when inb_first is called. inb_{first,next}
1867 * disabling SCSIEN until we see the first REQ from the
2186 * L_Q context associated with this REQ (REQ occurs immediately after a
Daic7xxx.seq413 * driving REQ on the bus for the next byte.
417 * Drive REQ on the bus by enabling SCSI PIO.
422 /* Prevent our read from triggering another REQ */
657 * target to assert REQ before checking MSG, C/D and I/O for
1970 * and that REQ is already set when inb_first is called. inb_{first,next}
Daic79xx.reg3217 * DSP REQ Control