Searched refs:SAR (Results 1 – 10 of 10) sorted by relevance
| /drivers/dma/ |
| D | txx9dmac.h | 75 u64 SAR; /* Source Address Register */ member
85 u32 SAR; member
209 u64 SAR; member
215 u32 SAR; member
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| D | txx9dmac.c | 293 channel64_readq(dc, SAR), in txx9dmac_dump_regs()
305 channel32_readl(dc, SAR), in txx9dmac_dump_regs()
319 channel_writeq(dc, SAR, 0); in txx9dmac_reset_chan()
323 channel_writel(dc, SAR, 0); in txx9dmac_reset_chan()
481 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR); in txx9dmac_dump_desc()
486 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR, in txx9dmac_dump_desc()
494 d->CHAR, d->SAR, d->DAR, d->CNTR); in txx9dmac_dump_desc()
499 d->CHAR, d->SAR, d->DAR, d->CNTR, in txx9dmac_dump_desc()
762 desc->hwdesc.SAR = src + offset; in txx9dmac_prep_dma_memcpy()
768 desc->hwdesc32.SAR = src + offset; in txx9dmac_prep_dma_memcpy()
[all …]
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| D | idma64.c | 98 channel_writeq(idma64c, SAR, 0); in idma64_chan_start()
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| D | pl330.c | 337 SAR = 0, enumerator
719 dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val); in _emit_MOV()
1306 off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); in _setup_xfer()
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| /drivers/i2c/busses/ |
| D | i2c-rcar.c | 72 #define SAR (1 << 0) /* slave addr received */ macro
377 if (ssr_filtered & SAR) { in rcar_i2c_slave_irq()
382 rcar_i2c_write(priv, ICSIER, SDE | SSR | SAR); in rcar_i2c_slave_irq()
386 rcar_i2c_write(priv, ICSIER, SDR | SSR | SAR); in rcar_i2c_slave_irq()
390 rcar_i2c_write(priv, ICSSR, ~(SAR | SSR) & 0xff); in rcar_i2c_slave_irq()
397 rcar_i2c_write(priv, ICSIER, SAR); in rcar_i2c_slave_irq()
546 rcar_i2c_write(priv, ICSIER, SAR); in rcar_reg_slave()
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| /drivers/net/wireless/ath/ath9k/ |
| D | Kconfig | 116 TX99 support enables Specific Absorption Rate (SAR) testing.
117 SAR is the unit of measurement for the amount of radio frequency(RF)
119 limits used are expressed in the terms of SAR, which is a measure
124 governmental SAR regulations.
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| /drivers/dma/sh/ |
| D | shdmac.c | 42 #define SAR 0x00 /* Source Address Register */ macro
221 sh_dmae_writel(sh_chan, hw->sar, SAR); in dmae_set_reg()
466 u32 sar_buf = sh_dmae_readl(sh_chan, SAR); in sh_dmae_desc_completed()
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| /drivers/dma/dw/ |
| D | regs.h | 38 DW_REG(SAR); /* Source Address Register */
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| D | core.c | 173 channel_readl(dwc, SAR), in dwc_dump_chan_regs()
202 channel_writel(dwc, SAR, desc->lli.sar); in dwc_do_single_block()
514 return channel_readl(dwc, SAR); in dw_dma_get_src_addr()
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| /drivers/tty/ |
| D | synclinkmp.c | 357 #define SAR 0x84 macro
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