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Searched refs:SCLK_MUX_SEL (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/radeon/
Drv740d.h35 #define SCLK_MUX_SEL(x) ((x) << 0) macro
Drv730d.h38 #define SCLK_MUX_SEL(x) ((x) << 0) macro
Drv740_dpm.c153 spll_func_cntl_2 |= SCLK_MUX_SEL(2); in rv740_populate_sclk_value()
372 spll_func_cntl_2 |= SCLK_MUX_SEL(4); in rv740_populate_smc_acpi_state()
Drv730_dpm.c85 spll_func_cntl_2 |= SCLK_MUX_SEL(2); in rv730_populate_sclk_value()
295 spll_func_cntl_2 |= SCLK_MUX_SEL(4); in rv730_populate_smc_acpi_state()
Drv770d.h101 #define SCLK_MUX_SEL(x) ((x) << 0) macro
Dnid.h548 #define SCLK_MUX_SEL(x) ((x) << 0) macro
Dsid.h95 #define SCLK_MUX_SEL(x) ((x) << 0) macro
Dcikd.h260 #define SCLK_MUX_SEL(x) ((x) << 0) macro
Drv770_dpm.c532 spll_func_cntl_2 |= SCLK_MUX_SEL(2); in rv770_populate_sclk_value()
980 spll_func_cntl_2 |= SCLK_MUX_SEL(4); in rv770_populate_smc_acpi_state()
Drv770.c1141 tmp |= SCLK_MUX_SEL(1) | SCLK_MUX_UPDATE; in rv770_set_clk_bypass_mode()
Devergreend.h83 #define SCLK_MUX_SEL(x) ((x) << 0) macro
Dni_dpm.c1903 spll_func_cntl_2 |= SCLK_MUX_SEL(4); in ni_populate_smc_acpi_state()
2034 spll_func_cntl_2 |= SCLK_MUX_SEL(2); in ni_calculate_sclk_params()
Dcypress_dpm.c1431 spll_func_cntl_2 |= SCLK_MUX_SEL(4); in cypress_populate_smc_acpi_state()
Dsi_dpm.c4627 spll_func_cntl_2 |= SCLK_MUX_SEL(4); in si_populate_smc_acpi_state()
4867 spll_func_cntl_2 |= SCLK_MUX_SEL(2); in si_calculate_sclk_params()
Dci_dpm.c3002 spll_func_cntl_2 |= SCLK_MUX_SEL(4); in ci_populate_smc_acpi_level()