Searched refs:SH_MEM_CONFIG (Results 1 – 6 of 6) sorted by relevance
| /drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v8_0.c | 2923 tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, DEFAULT_MTYPE, MTYPE_UC); in gfx_v8_0_gpu_init()
2924 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, APE1_MTYPE, MTYPE_UC); in gfx_v8_0_gpu_init()
2925 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v8_0_gpu_init()
2929 tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, DEFAULT_MTYPE, MTYPE_NC); in gfx_v8_0_gpu_init()
2930 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, APE1_MTYPE, MTYPE_NC); in gfx_v8_0_gpu_init()
2931 tmp = REG_SET_FIELD(tmp, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v8_0_gpu_init()
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| D | gfx_v7_0.c | 2232 sh_mem_cfg = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE, in gfx_v7_0_gpu_init()
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| /drivers/gpu/drm/radeon/ |
| D | radeon_kfd.c | 388 write_register(kgd, SH_MEM_CONFIG, sh_mem_config); in kgd_program_sh_mem_settings()
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| D | cik_sdma.c | 966 radeon_ring_write(ring, SH_MEM_CONFIG >> 2); in cik_dma_vm_flush()
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| D | cikd.h | 1173 #define SH_MEM_CONFIG 0x8C34 macro
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| D | cik.c | 5801 WREG32(SH_MEM_CONFIG, sh_mem_config); in cik_pcie_init_compute_vmid()
5909 WREG32(SH_MEM_CONFIG, 0); in cik_pcie_gart_enable()
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