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Searched refs:SOR_CLK_CNTRL_DP_CLK_SEL_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Dsor.h67 #define SOR_CLK_CNTRL_DP_CLK_SEL_MASK (3 << 0) macro
Dsor.c1241 value &= ~SOR_CLK_CNTRL_DP_CLK_SEL_MASK; in tegra_sor_edp_enable()
1866 value &= ~SOR_CLK_CNTRL_DP_CLK_SEL_MASK; in tegra_sor_hdmi_enable()