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Searched refs:SOR_DP_PADCTL_TX_PU_ENABLE (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Dsor.h271 #define SOR_DP_PADCTL_TX_PU_ENABLE (1 << 22) macro
Dsor.c259 value |= SOR_DP_PADCTL_TX_PU_ENABLE; in tegra_sor_dp_train_fast()
2003 value |= SOR_DP_PADCTL_TX_PU_ENABLE; in tegra_sor_hdmi_enable()