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Searched refs:SOR_PLL0_VCOPD (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Dsor.h100 #define SOR_PLL0_VCOPD (1 << 2) macro
Dsor.c770 value |= SOR_PLL0_VCOPD | SOR_PLL0_PWR; in tegra_sor_power_down()
1297 value |= SOR_PLL0_VCOPD | SOR_PLL0_PWR; in tegra_sor_edp_enable()
1320 value &= ~SOR_PLL0_VCOPD; in tegra_sor_edp_enable()
1822 value &= ~SOR_PLL0_VCOPD; in tegra_sor_hdmi_enable()