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Searched refs:SOR_STATE_ASY_VSYNCPOL (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Dsor.h30 #define SOR_STATE_ASY_VSYNCPOL (1 << 13) macro
Dsor.c1511 value &= ~SOR_STATE_ASY_VSYNCPOL; in tegra_sor_edp_enable()
1514 value |= SOR_STATE_ASY_VSYNCPOL; in tegra_sor_edp_enable()
2056 value &= ~SOR_STATE_ASY_VSYNCPOL; in tegra_sor_hdmi_enable()
2059 value |= SOR_STATE_ASY_VSYNCPOL; in tegra_sor_hdmi_enable()