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Searched refs:SPLL_RESET (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/radeon/
Drv740d.h27 #define SPLL_RESET (1 << 0) macro
Drv730d.h27 #define SPLL_RESET (1 << 0) macro
Drs780d.h27 # define SPLL_RESET (1 << 0) macro
Drv740_dpm.c369 spll_func_cntl |= SPLL_RESET | SPLL_SLEEP | SPLL_BYPASS_EN; in rv740_populate_smc_acpi_state()
Drv730_dpm.c291 spll_func_cntl |= SPLL_RESET | SPLL_BYPASS_EN; in rv730_populate_smc_acpi_state()
Drv770d.h90 #define SPLL_RESET (1 << 0) macro
Dnid.h539 #define SPLL_RESET (1 << 0) macro
Dsid.h86 #define SPLL_RESET (1 << 0) macro
Dcikd.h251 #define SPLL_RESET (1 << 0) macro
Devergreend.h75 #define SPLL_RESET (1 << 0) macro
Dr600d.h1271 # define SPLL_RESET (1 << 0) macro
Dcypress_dpm.c1428 spll_func_cntl |= SPLL_RESET | SPLL_SLEEP | SPLL_BYPASS_EN; in cypress_populate_smc_acpi_state()
Drv770_dpm.c977 spll_func_cntl |= SPLL_RESET | SPLL_SLEEP | SPLL_BYPASS_EN; in rv770_populate_smc_acpi_state()
Dsi.c4020 tmp |= SPLL_RESET; in si_spll_powerdown()
Dci_dpm.c2999 spll_func_cntl |= SPLL_RESET; in ci_populate_smc_acpi_level()