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Searched refs:SR1A (Results 1 – 4 of 4) sorted by relevance

/drivers/video/fbdev/via/
Dvia_utility.c165 sr1a = (unsigned int)viafb_read_reg(VIASR, SR1A); in viafb_set_gamma_table()
166 viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0); in viafb_set_gamma_table()
183 viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0); in viafb_set_gamma_table()
194 viafb_write_reg(SR1A, VIASR, sr1a); in viafb_set_gamma_table()
220 sr1a = viafb_read_reg(VIASR, SR1A); in viafb_get_gamma_table()
221 viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0); in viafb_get_gamma_table()
233 viafb_write_reg(SR1A, VIASR, sr1a); in viafb_get_gamma_table()
Dviamode.c30 {VIASR, SR1A, 0xFB, 0x08},
63 {VIASR, SR1A, 0xFB, 0x82},
112 {VIASR, SR1A, 0xFF, 0x0a}, /* GFX PREQ threshold */
150 {VIASR, SR1A, 0xFB, 0x08},
186 {VIASR, SR1A, 0xFB, 0x08},
220 {VIASR, SR1A, 0xFB, 0x08},
Dshare.h72 #define SR1A 0x1A macro
Dhw.c975 viafb_write_reg_mask(SR1A, VIASR, 0x02, BIT1); in load_fix_bit_crtc_reg()
1682 viafb_write_reg_mask(SR1A, VIASR, 0x00, BIT0); in viafb_init_dac()
1696 viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0); in viafb_init_dac()
1703 viafb_write_reg_mask(SR1A, VIASR, 0x00, BIT0); in viafb_init_dac()