| /drivers/clk/samsung/ |
| D | clk-exynos3250.c | 36 #define SRC_TOP0 0xc210 macro
120 SRC_TOP0,
260 MUX(CLK_MOUT_EBI, "mout_ebi", mout_ebi_p, SRC_TOP0, 28, 1),
261 MUX(CLK_MOUT_ACLK_200, "mout_aclk_200", group_div_mpll_pre_p,SRC_TOP0, 24, 1),
262 MUX(CLK_MOUT_ACLK_160, "mout_aclk_160", group_div_mpll_pre_p, SRC_TOP0, 20, 1),
263 MUX(CLK_MOUT_ACLK_100, "mout_aclk_100", group_div_mpll_pre_p, SRC_TOP0, 16, 1),
264 MUX(CLK_MOUT_ACLK_266_1, "mout_aclk_266_1", mout_aclk_266_1_p, SRC_TOP0, 14, 1),
265 MUX(CLK_MOUT_ACLK_266_0, "mout_aclk_266_0", mout_aclk_266_0_p, SRC_TOP0, 13, 1),
266 MUX(CLK_MOUT_ACLK_266, "mout_aclk_266", mout_aclk_266_p, SRC_TOP0, 12, 1),
267 MUX(CLK_MOUT_VPLL, "mout_vpll", mout_vpll_p, SRC_TOP0, 8, 1),
[all …]
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| D | clk-exynos5420.c | 52 #define SRC_TOP0 0x10200 macro
183 SRC_TOP0,
516 MUX(0, "mout_aclk400_isp", mout_group3_5800_p, SRC_TOP0, 0, 3),
517 MUX(0, "mout_aclk400_mscl", mout_group3_5800_p, SRC_TOP0, 4, 3),
518 MUX(0, "mout_aclk400_wcore", mout_group2_5800_p, SRC_TOP0, 16, 3),
519 MUX(0, "mout_aclk100_noc", mout_group1_5800_p, SRC_TOP0, 20, 2),
592 MUX(0, "mout_aclk400_isp", mout_group1_p, SRC_TOP0, 0, 2),
594 SRC_TOP0, 4, 2, "aclk400_mscl"),
595 MUX(0, "mout_aclk400_wcore", mout_group1_p, SRC_TOP0, 16, 2),
596 MUX(0, "mout_aclk100_noc", mout_group1_p, SRC_TOP0, 20, 2),
[all …]
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| D | clk-exynos4415.c | 47 #define SRC_TOP0 0xc210 macro
139 SRC_TOP0,
300 MUX(CLK_MOUT_EBI, "mout_ebi", mout_ebi_p, SRC_TOP0, 28, 1),
302 SRC_TOP0, 24, 1),
304 SRC_TOP0, 20, 1),
306 SRC_TOP0, 16, 1),
308 SRC_TOP0, 12, 1),
310 SRC_TOP0, 8, 1),
311 MUX(CLK_MOUT_EPLL, "mout_epll", mout_epll_p, SRC_TOP0, 4, 1),
312 MUX(CLK_MOUT_EBI_1, "mout_ebi_1", mout_ebi_1_p, SRC_TOP0, 0, 1),
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| D | clk-exynos4.c | 43 #define SRC_TOP0 0xc210 macro
213 SRC_TOP0,
549 MUX(0, "mout_onenand1", mout_onenand1_p, SRC_TOP0, 0, 1),
550 MUX(CLK_SCLK_EPLL, "sclk_epll", mout_epll_p, SRC_TOP0, 4, 1),
551 MUX(0, "mout_onenand", mout_onenand_p, SRC_TOP0, 28, 1),
571 MUX(0, "mout_aclk200", sclk_ampll_p4210, SRC_TOP0, 12, 1),
572 MUX(0, "mout_aclk100", sclk_ampll_p4210, SRC_TOP0, 16, 1),
573 MUX(0, "mout_aclk160", sclk_ampll_p4210, SRC_TOP0, 20, 1),
574 MUX(0, "mout_aclk133", sclk_ampll_p4210, SRC_TOP0, 24, 1),
585 MUX(CLK_SCLK_VPLL, "sclk_vpll", sclk_vpll_p4210, SRC_TOP0, 8, 1),
[all …]
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| D | clk-exynos5250.c | 42 #define SRC_TOP0 0x10210 macro
126 SRC_TOP0,
308 MUX(0, "mout_aclk166", mout_aclk166_p, SRC_TOP0, 8, 1),
309 MUX(0, "mout_aclk200", mout_aclk200_p, SRC_TOP0, 12, 1),
310 MUX(0, "mout_aclk300_disp1_mid", mout_aclk200_p, SRC_TOP0, 14, 1),
311 MUX(0, "mout_aclk300", mout_aclk300_p, SRC_TOP0, 15, 1),
312 MUX(0, "mout_aclk333", mout_aclk166_p, SRC_TOP0, 16, 1),
313 MUX(0, "mout_aclk400_g3d_mid", mout_aclk200_p, SRC_TOP0, 20, 1),
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| D | clk-exynos5410.c | 39 #define SRC_TOP0 0x10210 macro
104 MUX(0, "mout_aclk200", mpll_bpll_p, SRC_TOP0, 12, 1),
105 MUX(0, "mout_aclk400", mpll_bpll_p, SRC_TOP0, 20, 1),
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