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Searched refs:TEGRA_DIVIDER_INT (Results 1 – 4 of 4) sorted by relevance

/drivers/clk/tegra/
Dclk-divider.c44 if (!(flags & TEGRA_DIVIDER_INT)) in get_div()
52 if (flags & TEGRA_DIVIDER_INT) in get_div()
Dclk-tegra-periph.c160 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
167 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
174 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
194 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
575 PLL_OUT(2, PLLP_OUTA, 24, TEGRA_DIVIDER_INT, 16, pll_p_out2_int),
Dclk-tegra30.c196 30, 2, 0, 0, 8, 1, TEGRA_DIVIDER_INT | \
1023 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
1032 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
1041 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
1058 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
1067 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
1076 TEGRA_DIVIDER_INT, 16, 8, 1, NULL); in tegra30_super_clk_init()
Dclk.h81 #define TEGRA_DIVIDER_INT BIT(2) macro