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Searched refs:TRAP_ENABLE (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dsdma_v2_4.c1185 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v2_4_set_trap_irq_state()
1190 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v2_4_set_trap_irq_state()
1201 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v2_4_set_trap_irq_state()
1206 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v2_4_set_trap_irq_state()
Dsdma_v3_0.c1347 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v3_0_set_trap_irq_state()
1352 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v3_0_set_trap_irq_state()
1363 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v3_0_set_trap_irq_state()
1368 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v3_0_set_trap_irq_state()
/drivers/gpu/drm/radeon/
Devergreen.c4550 tmp = RREG32(CAYMAN_DMA1_CNTL) & ~TRAP_ENABLE; in evergreen_disable_interrupt_state()
4554 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_disable_interrupt_state()
4643 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_irq_set()
4669 dma_cntl |= TRAP_ENABLE; in evergreen_irq_set()
4673 dma_cntl1 = RREG32(CAYMAN_DMA1_CNTL) & ~TRAP_ENABLE; in evergreen_irq_set()
4676 dma_cntl1 |= TRAP_ENABLE; in evergreen_irq_set()
Dsi.c5944 tmp = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
5946 tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
6099 dma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6100 dma_cntl1 = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6120 dma_cntl |= TRAP_ENABLE; in si_irq_set()
6125 dma_cntl1 |= TRAP_ENABLE; in si_irq_set()
Dnid.h1323 # define TRAP_ENABLE (1 << 0) macro
Dsid.h1832 # define TRAP_ENABLE (1 << 0) macro
Dcik.c7281 tmp = RREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_disable_interrupt_state()
7283 tmp = RREG32(SDMA0_CNTL + SDMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_disable_interrupt_state()
7465 dma_cntl = RREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_irq_set()
7466 dma_cntl1 = RREG32(SDMA0_CNTL + SDMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_irq_set()
7510 dma_cntl |= TRAP_ENABLE; in cik_irq_set()
7515 dma_cntl1 |= TRAP_ENABLE; in cik_irq_set()
Dcikd.h1963 # define TRAP_ENABLE (1 << 0) macro
Dr600.c3577 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_disable_interrupt_state()
3759 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_irq_set()
3781 dma_cntl |= TRAP_ENABLE; in r600_irq_set()
Devergreend.h1405 # define TRAP_ENABLE (1 << 0) macro
Dr600d.h632 # define TRAP_ENABLE (1 << 0) macro