Searched refs:UTMIPLL_HW_PWRDN_CFG0 (Results 1 – 2 of 2) sorted by relevance
132 #define UTMIPLL_HW_PWRDN_CFG0 0x52c macro1020 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()1024 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()1035 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()1038 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()1043 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()1045 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()
118 #define UTMIPLL_HW_PWRDN_CFG0 0x52c macro1079 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()1083 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()1094 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()1097 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()1102 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()1104 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()