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Searched refs:VGA_HDP_CONTROL (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/radeon/
Davivod.h53 #define VGA_HDP_CONTROL 0x328 macro
Dsid.h74 #define VGA_HDP_CONTROL 0x328 macro
Dcikd.h437 #define VGA_HDP_CONTROL 0x328 macro
Drv770.c1026 WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE); in rv770_mc_program()
Devergreen.c2760 save->vga_hdp_control = RREG32(VGA_HDP_CONTROL); in evergreen_mc_stop()
2933 WREG32(VGA_HDP_CONTROL, save->vga_hdp_control); in evergreen_mc_resume()
2960 WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE); in evergreen_mc_program()
Dr600.c1316 WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE); in r600_mc_program()
Dsi.c4155 WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE); in si_mc_program()
Dcik.c5672 WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE); in cik_mc_program()
/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c673 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 0); in dce_v8_0_set_vga_render_state()
675 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); in dce_v8_0_set_vga_render_state()
Ddce_v10_0.c698 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 0); in dce_v10_0_set_vga_render_state()
700 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); in dce_v10_0_set_vga_render_state()
Ddce_v11_0.c686 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 0); in dce_v11_0_set_vga_render_state()
688 tmp = REG_SET_FIELD(tmp, VGA_HDP_CONTROL, VGA_MEMORY_DISABLE, 1); in dce_v11_0_set_vga_render_state()