Searched refs:VM_L2_CNTL3 (Results 1 – 14 of 14) sorted by relevance
/drivers/gpu/drm/amd/amdgpu/ |
D | gmc_v8_0.c | 611 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY, 1); in gmc_v8_0_gart_enable() 612 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 4); in gmc_v8_0_gart_enable() 613 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, 4); in gmc_v8_0_gart_enable()
|
D | gmc_v7_0.c | 548 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY, 1); in gmc_v7_0_gart_enable() 549 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 4); in gmc_v7_0_gart_enable() 550 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, 4); in gmc_v7_0_gart_enable()
|
/drivers/gpu/drm/radeon/ |
D | rv770.c | 908 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_pcie_gart_enable() 954 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_pcie_gart_disable() 985 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in rv770_agp_enable()
|
D | rv770d.h | 649 #define VM_L2_CNTL3 0x1408 macro
|
D | ni.c | 1305 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in cayman_pcie_gart_enable() 1384 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in cayman_pcie_gart_disable()
|
D | nid.h | 120 #define VM_L2_CNTL3 0x1408 macro
|
D | sid.h | 385 #define VM_L2_CNTL3 0x1408 macro
|
D | cikd.h | 505 #define VM_L2_CNTL3 0x1408 macro
|
D | r600.c | 1139 WREG32(VM_L2_CNTL3, BANK_SELECT_0(0) | BANK_SELECT_1(1)); in r600_pcie_gart_enable() 1191 WREG32(VM_L2_CNTL3, BANK_SELECT_0(0) | BANK_SELECT_1(1)); in r600_pcie_gart_disable() 1231 WREG32(VM_L2_CNTL3, BANK_SELECT_0(0) | BANK_SELECT_1(1)); in r600_agp_enable()
|
D | evergreen.c | 2511 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_pcie_gart_enable() 2564 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_pcie_gart_disable() 2594 WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2)); in evergreen_agp_enable()
|
D | evergreend.h | 1158 #define VM_L2_CNTL3 0x1408 macro
|
D | r600d.h | 595 #define VM_L2_CNTL3 0x1408 macro
|
D | si.c | 4304 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in si_pcie_gart_enable() 4390 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in si_pcie_gart_disable()
|
D | cik.c | 5848 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in cik_pcie_gart_enable() 5967 WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY | in cik_pcie_gart_disable()
|