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Searched refs:WREG32_IDX (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/radeon/
Dradeon_cursor.c66 WREG32_IDX(EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset, in radeon_hide_cursor()
70 WREG32_IDX(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, in radeon_hide_cursor()
84 WREG32_IDX(reg, RREG32_IDX(reg) & ~RADEON_CRTC_CUR_EN); in radeon_hide_cursor()
Dradeon_combios.c3249 WREG32_IDX((addr) | RADEON_MM_APER, 0xdeadbeef); in combios_detect_ram()
Dradeon.h2530 #define WREG32_IDX(reg, v) r100_mm_wreg(rdev, (reg), (v), true) macro
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_cgs.c330 return WREG32_IDX(index, value); in amdgpu_cgs_write_ind_register()
Ddce_v8_0.c2418 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, in dce_v8_0_hide_cursor()
2433 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, in dce_v8_0_show_cursor()
Ddce_v10_0.c2480 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v10_0_hide_cursor()
2497 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v10_0_show_cursor()
Ddce_v11_0.c2469 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v11_0_hide_cursor()
2486 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v11_0_show_cursor()
Damdgpu.h2146 #define WREG32_IDX(reg, v) amdgpu_mm_wreg(adev, (reg), (v), true) macro