Searched refs:WREG32_UVD_CTX (Results 1 – 6 of 6) sorted by relevance
/drivers/gpu/drm/amd/amdgpu/ |
D | uvd_v4_2.c | 617 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v4_2_enable_mgcg() 626 WREG32_UVD_CTX(ixUVD_CGC_MEM_CTRL, data); in uvd_v4_2_enable_mgcg() 657 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v4_2_set_dcm()
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D | amdgpu_cgs.c | 336 return WREG32_UVD_CTX(index, value); in amdgpu_cgs_write_ind_register()
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D | amdgpu.h | 2154 #define WREG32_UVD_CTX(reg, v) adev->uvd_ctx_wreg(adev, (reg), (v)) macro
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/drivers/gpu/drm/radeon/ |
D | si.c | 5176 WREG32_UVD_CTX(UVD_CGC_CTRL2, tmp2); in si_set_uvd_dcm() 5446 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, tmp); in si_enable_uvd_mgcg() 5458 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, tmp); in si_enable_uvd_mgcg()
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D | radeon.h | 2552 #define WREG32_UVD_CTX(reg, v) r600_uvd_ctx_wreg(rdev, (reg), (v)) macro
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D | cik.c | 6626 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, data); in cik_enable_uvd_mgcg() 6635 WREG32_UVD_CTX(UVD_CGC_MEM_CTRL, data); in cik_enable_uvd_mgcg()
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