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Searched refs:Write (Results 1 – 13 of 13) sorted by relevance

/drivers/block/
DDAC960.h2567 } Write; member
2588 } Write; member
2640 InboundDoorBellRegister.Write.HardwareMailboxNewCommand = true; in DAC960_GEM_HardwareMailboxNewCommand()
2650 InboundDoorBellRegister.Write.AcknowledgeHardwareMailboxStatus = true; in DAC960_GEM_AcknowledgeHardwareMailboxStatus()
2660 InboundDoorBellRegister.Write.GenerateInterrupt = true; in DAC960_GEM_GenerateInterrupt()
2670 InboundDoorBellRegister.Write.ControllerReset = true; in DAC960_GEM_ControllerReset()
2680 InboundDoorBellRegister.Write.MemoryMailboxNewCommand = true; in DAC960_GEM_MemoryMailboxNewCommand()
2710 OutboundDoorBellRegister.Write.AcknowledgeHardwareMailboxInterrupt = true; in DAC960_GEM_AcknowledgeHardwareMailboxInterrupt()
2720 OutboundDoorBellRegister.Write.AcknowledgeMemoryMailboxInterrupt = true; in DAC960_GEM_AcknowledgeMemoryMailboxInterrupt()
2730 OutboundDoorBellRegister.Write.AcknowledgeHardwareMailboxInterrupt = true; in DAC960_GEM_AcknowledgeInterrupt()
[all …]
/drivers/isdn/hardware/mISDN/
Diohelper.h43 static void Write##name##_IO(void *p, u8 off, u8 val) { \
62 static void Write##name##_IND(void *p, u8 off, u8 val) { \
83 static void Write##name##_MIO(void *p, u8 off, u8 val) { \
100 dest.write_reg = &Write##name##_##typ; \
/drivers/net/wireless/ath/wil6210/
DKconfig24 COR (Clear-On-Read) or W1C (Write-1-to-Clear) mode.
/drivers/isdn/sc/
Dinterrupt.c83 if (IS_CE_MESSAGE(rcvmsg, Lnk, 1, Write)) { in interrupt_handler()
/drivers/staging/iio/Documentation/
Ddevice.txt53 Write the value associated with on sensor event detectors. E.g.
/drivers/net/wireless/mwifiex/
DREADME180 echo "1 0xa060 0x12" > regrdwr : Write the MAC register
182 : Write 0x80000000 to MAC register
/drivers/pci/
DKconfig15 generate an interrupt using an inbound Memory Write on its
/drivers/mtd/
DKconfig236 bool "Write support for NFTL"
288 Write support is only lightly tested, therefore this driver
/drivers/scsi/aic7xxx/
Daic79xx.reg3167 * Data FIFO Write Address
3240 * Read/Write byte port into the data FIFO. The read and write
3267 * Write Bias Control
3296 * Write Bias Calculator
3589 * 2's complement to bit value conversion. Write the 2's complement value
3593 * Write 0x60
Daic7xxx.reg144 * SCSI Control Signal Write Register (p. 3-16).
215 * Read/Write latches used to transfer data on the SCSI bus during
/drivers/edac/
DKconfig122 which trigger the DRAM ECC Read and Write respectively.
/drivers/mtd/maps/
DKconfig140 Note that jumper 3 ("Write Enable Drive A") must be set
/drivers/scsi/aacraid/
Daacraid.h1301 #define Write 6 macro