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Searched refs:_pname (Results 1 – 3 of 3) sorted by relevance

/drivers/clk/pistachio/
Dclk.h22 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
28 .parent = _pname, \
62 #define DIV(_id, _name, _pname, _reg, _width) \ argument
69 .parent = _pname, \
72 #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \ argument
79 .parent = _pname, \
89 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
94 .parent = _pname, \
122 #define PLL(_id, _name, _pname, _type, _reg, _rates) \ argument
130 .parent = _pname, \
[all …]
/drivers/clk/samsung/
Dclk.h301 #define __PLL(_typ, _id, _dname, _name, _pname, _flags, _lock, _con, \ argument
308 .parent_name = _pname, \
316 #define PLL(_typ, _id, _name, _pname, _lock, _con, _rtable) \ argument
317 __PLL(_typ, _id, NULL, _name, _pname, CLK_GET_RATE_NOCACHE, \
320 #define PLL_A(_typ, _id, _name, _pname, _lock, _con, _alias, _rtable) \ argument
321 __PLL(_typ, _id, NULL, _name, _pname, CLK_GET_RATE_NOCACHE, \
/drivers/regulator/
Dtps6586x-regulator.c160 #define TPS6586X_LDO(_id, _pname, vdata, vreg, shift, nbits, \ argument
163 TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \
167 #define TPS6586X_LDO_LINEAR(_id, _pname, n_volt, min_uv, uv_step, vreg, \ argument
170 TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \
175 #define TPS6586X_FIXED_LDO(_id, _pname, vdata, vreg, shift, nbits, \ argument
178 TPS6586X_REGULATOR(_id, ro, _pname, vdata, vreg, shift, nbits, \
182 #define TPS6586X_DVM(_id, _pname, n_volt, min_uv, uv_step, vreg, shift, \ argument
185 TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \