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Searched refs:afu (Results 1 – 17 of 17) sorted by relevance

/drivers/misc/cxl/
Dnative.c23 static int afu_control(struct cxl_afu *afu, u64 command, in afu_control() argument
26 u64 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An); in afu_control()
30 spin_lock(&afu->afu_cntl_lock); in afu_control()
33 trace_cxl_afu_ctrl(afu, command); in afu_control()
35 cxl_p2n_write(afu, CXL_AFU_Cntl_An, AFU_Cntl | command); in afu_control()
37 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An); in afu_control()
40 dev_warn(&afu->dev, "WARNING: AFU control timed out!\n"); in afu_control()
45 if (!cxl_adapter_link_ok(afu->adapter)) { in afu_control()
46 afu->enabled = enabled; in afu_control()
54 AFU_Cntl = cxl_p2n_read(afu, CXL_AFU_Cntl_An); in afu_control()
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Dpci.c93 #define AFUD_READ(afu, off) in_be64(afu->afu_desc_mmio + off) argument
94 #define AFUD_READ_LE(afu, off) in_le64(afu->afu_desc_mmio + off) argument
98 #define AFUD_READ_INFO(afu) AFUD_READ(afu, 0x0) argument
107 #define AFUD_READ_CR(afu) AFUD_READ(afu, 0x20) argument
109 #define AFUD_READ_CR_OFF(afu) AFUD_READ(afu, 0x28) argument
110 #define AFUD_READ_PPPSA(afu) AFUD_READ(afu, 0x30) argument
114 #define AFUD_READ_PPPSA_OFF(afu) AFUD_READ(afu, 0x38) argument
115 #define AFUD_READ_EB(afu) AFUD_READ(afu, 0x40) argument
117 #define AFUD_READ_EB_OFF(afu) AFUD_READ(afu, 0x48) argument
119 u16 cxl_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off) in cxl_afu_cr_read16() argument
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Dtrace.h65 __field(u8, afu)
70 __entry->card = ctx->afu->adapter->adapter_num;
71 __entry->afu = ctx->afu->slice;
77 __entry->afu,
90 __field(u8, afu)
99 __entry->card = ctx->afu->adapter->adapter_num;
100 __entry->afu = ctx->afu->slice;
110 __entry->afu,
131 __field(u8, afu)
139 __entry->card = ctx->afu->adapter->adapter_num;
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Dirq.c27 fir1 = cxl_p1_read(ctx->afu->adapter, CXL_PSL_FIR1); in handle_psl_slice_error()
28 fir2 = cxl_p1_read(ctx->afu->adapter, CXL_PSL_FIR2); in handle_psl_slice_error()
29 fir_slice = cxl_p1n_read(ctx->afu, CXL_PSL_FIR_SLICE_An); in handle_psl_slice_error()
30 serr = cxl_p1n_read(ctx->afu, CXL_PSL_SERR_An); in handle_psl_slice_error()
31 afu_debug = cxl_p1n_read(ctx->afu, CXL_AFU_DEBUG_An); in handle_psl_slice_error()
33 dev_crit(&ctx->afu->dev, "PSL ERROR STATUS: 0x%016llx\n", errstat); in handle_psl_slice_error()
34 dev_crit(&ctx->afu->dev, "PSL_FIR1: 0x%016llx\n", fir1); in handle_psl_slice_error()
35 dev_crit(&ctx->afu->dev, "PSL_FIR2: 0x%016llx\n", fir2); in handle_psl_slice_error()
36 dev_crit(&ctx->afu->dev, "PSL_SERR_An: 0x%016llx\n", serr); in handle_psl_slice_error()
37 dev_crit(&ctx->afu->dev, "PSL_FIR_SLICE_An: 0x%016llx\n", fir_slice); in handle_psl_slice_error()
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Dsysfs.c157 struct cxl_afu *afu = to_afu_chardev_m(device); in mmio_size_show_master() local
159 return scnprintf(buf, PAGE_SIZE, "%llu\n", afu->adapter->ps_size); in mmio_size_show_master()
166 struct cxl_afu *afu = to_afu_chardev_m(device); in pp_mmio_off_show() local
168 return scnprintf(buf, PAGE_SIZE, "%llu\n", afu->pp_offset); in pp_mmio_off_show()
175 struct cxl_afu *afu = to_afu_chardev_m(device); in pp_mmio_len_show() local
177 return scnprintf(buf, PAGE_SIZE, "%llu\n", afu->pp_size); in pp_mmio_len_show()
193 struct cxl_afu *afu = to_cxl_afu(device); in mmio_size_show() local
195 if (afu->pp_size) in mmio_size_show()
196 return scnprintf(buf, PAGE_SIZE, "%llu\n", afu->pp_size); in mmio_size_show()
197 return scnprintf(buf, PAGE_SIZE, "%llu\n", afu->adapter->ps_size); in mmio_size_show()
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Dfile.c32 #define CXL_AFU_MINOR_D(afu) (CXL_CARD_MINOR(afu->adapter) + 1 + (3 * afu->slice)) argument
33 #define CXL_AFU_MINOR_M(afu) (CXL_AFU_MINOR_D(afu) + 1) argument
34 #define CXL_AFU_MINOR_S(afu) (CXL_AFU_MINOR_D(afu) + 2) argument
35 #define CXL_AFU_MKDEV_D(afu) MKDEV(MAJOR(cxl_dev), CXL_AFU_MINOR_D(afu)) argument
36 #define CXL_AFU_MKDEV_M(afu) MKDEV(MAJOR(cxl_dev), CXL_AFU_MINOR_M(afu)) argument
37 #define CXL_AFU_MKDEV_S(afu) MKDEV(MAJOR(cxl_dev), CXL_AFU_MINOR_S(afu)) argument
51 struct cxl_afu *afu; in __afu_open() local
66 if (!(afu = adapter->afu[slice])) { in __afu_open()
76 cxl_afu_get(afu); in __afu_open()
79 if (!afu->current_mode) in __afu_open()
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Dcxl.h407 static inline struct cxl_afu *cxl_afu_get(struct cxl_afu *afu) in cxl_afu_get() argument
410 return (get_device(&afu->dev) == NULL) ? NULL : afu; in cxl_afu_get()
413 static inline void cxl_afu_put(struct cxl_afu *afu) in cxl_afu_put() argument
415 put_device(&afu->dev); in cxl_afu_put()
429 struct cxl_afu *afu; member
497 struct cxl_afu *afu[CXL_MAX_SLICES]; member
586 static inline void __iomem *_cxl_p1n_addr(struct cxl_afu *afu, cxl_p1n_reg_t reg) in _cxl_p1n_addr() argument
589 return afu->p1n_mmio + cxl_reg_off(reg); in _cxl_p1n_addr()
592 static inline void cxl_p1n_write(struct cxl_afu *afu, cxl_p1n_reg_t reg, u64 val) in cxl_p1n_write() argument
594 if (likely(cxl_adapter_link_ok(afu->adapter))) in cxl_p1n_write()
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Dcontext.c37 int cxl_context_init(struct cxl_context *ctx, struct cxl_afu *afu, bool master, in cxl_context_init() argument
43 ctx->afu = afu; in cxl_context_init()
88 mutex_lock(&afu->contexts_lock); in cxl_context_init()
90 i = idr_alloc(&ctx->afu->contexts_idr, ctx, 0, in cxl_context_init()
91 ctx->afu->num_procs, GFP_NOWAIT); in cxl_context_init()
93 mutex_unlock(&afu->contexts_lock); in cxl_context_init()
98 ctx->elem = &ctx->afu->spa[i]; in cxl_context_init()
105 cxl_afu_get(afu); in cxl_context_init()
120 if (ctx->afu->current_mode == CXL_MODE_DEDICATED) { in cxl_mmap_fault()
121 area = ctx->afu->psn_phys; in cxl_mmap_fault()
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Ddebugfs.c28 if (adapter->afu[slice]) in cxl_stop_trace()
29 cxl_p1n_write(adapter->afu[slice], CXL_PSL_SLICE_TRACE, 0x8000000000000000LL); in cxl_stop_trace()
83 int cxl_debugfs_afu_add(struct cxl_afu *afu) in cxl_debugfs_afu_add() argument
88 if (!afu->adapter->debugfs) in cxl_debugfs_afu_add()
91 snprintf(buf, 32, "psl%i.%i", afu->adapter->adapter_num, afu->slice); in cxl_debugfs_afu_add()
92 dir = debugfs_create_dir(buf, afu->adapter->debugfs); in cxl_debugfs_afu_add()
95 afu->debugfs = dir; in cxl_debugfs_afu_add()
97 debugfs_create_io_x64("fir", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_FIR_SLICE_An)); in cxl_debugfs_afu_add()
98 debugfs_create_io_x64("serr", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_PSL_SERR_An)); in cxl_debugfs_afu_add()
99 debugfs_create_io_x64("afu_debug", S_IRUSR, dir, _cxl_p1n_addr(afu, CXL_AFU_DEBUG_An)); in cxl_debugfs_afu_add()
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Dvphb.c46 struct cxl_afu *afu; in cxl_pci_enable_device_hook() local
50 afu = (struct cxl_afu *)phb->private_data; in cxl_pci_enable_device_hook()
52 if (!cxl_adapter_link_ok(afu->adapter)) { in cxl_pci_enable_device_hook()
69 return (cxl_afu_check_and_enable(afu) == 0); in cxl_pci_enable_device_hook()
117 struct cxl_afu *afu; in cxl_pcie_config_info() local
123 afu = (struct cxl_afu *)phb->private_data; in cxl_pcie_config_info()
125 if (cxl_pcie_cfg_record(bus->number, devfn) > afu->crs_num) in cxl_pcie_config_info()
151 struct cxl_afu *afu; in cxl_config_link_ok() local
163 afu = (struct cxl_afu *)phb->private_data; in cxl_config_link_ok()
164 return cxl_adapter_link_ok(afu->adapter); in cxl_config_link_ok()
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Dapi.c22 struct cxl_afu *afu; in cxl_dev_context_init() local
26 afu = cxl_pci_to_afu(dev); in cxl_dev_context_init()
50 rc = cxl_context_init(ctx, afu, false, mapping); in cxl_dev_context_init()
75 struct cxl_afu *afu; in cxl_get_phys_dev() local
77 afu = cxl_pci_to_afu(dev); in cxl_get_phys_dev()
79 return afu->adapter->dev.parent; in cxl_get_phys_dev()
97 num = ctx->afu->pp_irqs; in cxl_allocate_afu_irqs()
105 cxl_release_irq_ranges(&ctx->irqs, ctx->afu->adapter); in cxl_free_afu_irqs()
138 return cxl_map_irq(ctx->afu->adapter, hwirq, handler, cookie, name); in cxl_map_afu_irq()
310 work->num_interrupts = ctx->afu->pp_irqs; in cxl_start_work()
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Dmain.c49 ctx->afu->adapter->adapter_num, ctx->afu->slice, ctx->pe); in _cxl_slbia()
56 cxl_afu_slbia(ctx->afu); in _cxl_slbia()
64 struct cxl_afu *afu; in cxl_slbia_core() local
75 afu = adapter->afu[slice]; in cxl_slbia_core()
76 if (!afu || !afu->enabled) in cxl_slbia_core()
79 idr_for_each_entry(&afu->contexts_idr, ctx, id) in cxl_slbia_core()
177 int cxl_afu_select_best_mode(struct cxl_afu *afu) in cxl_afu_select_best_mode() argument
179 if (afu->modes_supported & CXL_MODE_DIRECTED) in cxl_afu_select_best_mode()
180 return cxl_afu_activate_mode(afu, CXL_MODE_DIRECTED); in cxl_afu_select_best_mode()
182 if (afu->modes_supported & CXL_MODE_DEDICATED) in cxl_afu_select_best_mode()
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Dfault.c257 if (cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An) != dsisr || in cxl_handle_fault()
258 cxl_p2n_read(ctx->afu, CXL_PSL_DAR_An) != dar || in cxl_handle_fault()
259 cxl_p2n_read(ctx->afu, CXL_PSL_PEHandle_An) != ctx->pe) { in cxl_handle_fault()
263 dev_notice(&ctx->afu->dev, "cxl_handle_fault: Translation fault regs changed\n"); in cxl_handle_fault()
365 switch (ctx->afu->prefault_mode) { in cxl_prefault()
/drivers/scsi/cxlflash/
Dmain.c49 static struct afu_cmd *cmd_checkout(struct afu *afu) in cmd_checkout() argument
55 k = (afu->cmd_couts++ & (CXLFLASH_NUM_CMDS - 1)); in cmd_checkout()
57 cmd = &afu->cmd[k]; in cmd_checkout()
221 struct afu *afu = cmd->parent; in cmd_complete() local
222 struct cxlflash_cfg *cfg = afu->parent; in cmd_complete()
267 struct afu *afu = cmd->parent; in context_reset() local
288 room = readq_be(&afu->host_map->cmd_room); in context_reset()
289 atomic64_set(&afu->room, room); in context_reset()
300 writeq_be(rrin, &afu->host_map->ioarrin); in context_reset()
302 rrin = readq_be(&afu->host_map->ioarrin); in context_reset()
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Dvlun.c504 static int grow_lxt(struct afu *afu, in grow_lxt() argument
595 cxlflash_afu_sync(afu, ctxid, rhndl, AFU_LW_SYNC); in grow_lxt()
617 static int shrink_lxt(struct afu *afu, in shrink_lxt() argument
673 cxlflash_afu_sync(afu, ctxid, rhndl, AFU_HW_SYNC); in shrink_lxt()
734 struct afu *afu = cfg->afu; in _cxlflash_vlun_resize() local
785 rc = grow_lxt(afu, sdev, ctxid, rhndl, rhte, &new_size); in _cxlflash_vlun_resize()
787 rc = shrink_lxt(afu, sdev, rhndl, rhte, ctxi, &new_size); in _cxlflash_vlun_resize()
817 struct afu *afu = cfg->afu; in cxlflash_restore_luntable() local
818 struct sisl_global_map __iomem *agm = &afu->afu_map->global; in cxlflash_restore_luntable()
862 struct afu *afu = cfg->afu; in init_luntable() local
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Dsuperpipe.c252 struct afu *afu = cfg->afu; in afu_attach() local
271 val = SISL_RHT_CNT_ID((u64)MAX_RHT_PER_CONTEXT, (u64)(afu->ctx_hndl)); in afu_attach()
612 struct afu *afu = cfg->afu; in _cxlflash_disk_release() local
684 cxlflash_afu_sync(afu, ctxid, rhndl, AFU_HW_SYNC); in _cxlflash_disk_release()
724 struct afu *afu = cfg->afu; in destroy_context() local
729 if (afu->afu_map && ctxi->ctrl_map) { in destroy_context()
761 struct afu *afu = cfg->afu; in create_context() local
786 ctxi->ctrl_map = &afu->afu_map->ctrls[ctxid].ctrl; in create_context()
1293 struct afu *afu = cfg->afu; in cxlflash_disk_attach() local
1441 attach->mmio_size = sizeof(afu->afu_map->hosts[0].harea); in cxlflash_disk_attach()
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Dcommon.h95 struct afu *afu; member
139 struct afu *parent;
151 struct afu { struct
198 int cxlflash_afu_sync(struct afu *, ctx_hndl_t, res_hndl_t, u8); argument