| /drivers/gpu/drm/radeon/ |
| D | radeon_atombios.c | 2082 &rdev->pm.power_state[state_index].clock_info[0]; in radeon_atombios_parse_misc_flags_1_3()
2084 rdev->pm.power_state[state_index].clock_info[0].flags |= in radeon_atombios_parse_misc_flags_1_3()
2133 rdev->pm.power_state[state_index].clock_info = in radeon_atombios_parse_power_table_1_3()
2135 if (!rdev->pm.power_state[state_index].clock_info) in radeon_atombios_parse_power_table_1_3()
2138 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; in radeon_atombios_parse_power_table_1_3()
2141 rdev->pm.power_state[state_index].clock_info[0].mclk = in radeon_atombios_parse_power_table_1_3()
2143 rdev->pm.power_state[state_index].clock_info[0].sclk = in radeon_atombios_parse_power_table_1_3()
2146 if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || in radeon_atombios_parse_power_table_1_3()
2147 (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) in radeon_atombios_parse_power_table_1_3()
2154 rdev->pm.power_state[state_index].clock_info[0].voltage.type = in radeon_atombios_parse_power_table_1_3()
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| D | radeon_combios.c | 2649 rdev->pm.power_state[0].clock_info = in radeon_combios_get_power_modes()
2651 rdev->pm.power_state[1].clock_info = in radeon_combios_get_power_modes()
2653 if (!rdev->pm.power_state[0].clock_info || in radeon_combios_get_power_modes()
2654 !rdev->pm.power_state[1].clock_info) in radeon_combios_get_power_modes()
2732 rdev->pm.power_state[state_index].clock_info[0].mclk = RBIOS32(offset + 0x5 + 0x2); in radeon_combios_get_power_modes()
2733 rdev->pm.power_state[state_index].clock_info[0].sclk = RBIOS32(offset + 0x5 + 0x6); in radeon_combios_get_power_modes()
2734 if ((rdev->pm.power_state[state_index].clock_info[0].mclk == 0) || in radeon_combios_get_power_modes()
2735 (rdev->pm.power_state[state_index].clock_info[0].sclk == 0)) in radeon_combios_get_power_modes()
2745 rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_GPIO; in radeon_combios_get_power_modes()
2747 rdev->pm.power_state[state_index].clock_info[0].voltage.active_high = in radeon_combios_get_power_modes()
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| D | rs780_dpm.c | 749 union pplib_clock_info *clock_info) in rs780_parse_pplib_clock_info() argument
754 sclk = le16_to_cpu(clock_info->rs780.usLowEngineClockLow); in rs780_parse_pplib_clock_info()
755 sclk |= clock_info->rs780.ucLowEngineClockHigh << 16; in rs780_parse_pplib_clock_info()
757 sclk = le16_to_cpu(clock_info->rs780.usHighEngineClockLow); in rs780_parse_pplib_clock_info()
758 sclk |= clock_info->rs780.ucHighEngineClockHigh << 16; in rs780_parse_pplib_clock_info()
760 switch (le16_to_cpu(clock_info->rs780.usVDDC)) { in rs780_parse_pplib_clock_info()
779 ps->flags = le32_to_cpu(clock_info->rs780.ulFlags); in rs780_parse_pplib_clock_info()
795 union pplib_clock_info *clock_info; in rs780_parse_power_table() local
823 clock_info = (union pplib_clock_info *) in rs780_parse_power_table()
839 clock_info); in rs780_parse_power_table()
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| D | rv770_dpm.c | 2176 union pplib_clock_info *clock_info) in rv7xx_parse_pplib_clock_info() argument
2198 sclk = le16_to_cpu(clock_info->evergreen.usEngineClockLow); in rv7xx_parse_pplib_clock_info()
2199 sclk |= clock_info->evergreen.ucEngineClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2200 mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow); in rv7xx_parse_pplib_clock_info()
2201 mclk |= clock_info->evergreen.ucMemoryClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2203 pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC); in rv7xx_parse_pplib_clock_info()
2204 pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI); in rv7xx_parse_pplib_clock_info()
2205 pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags); in rv7xx_parse_pplib_clock_info()
2207 sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); in rv7xx_parse_pplib_clock_info()
2208 sclk |= clock_info->r600.ucEngineClockHigh << 16; in rv7xx_parse_pplib_clock_info()
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| D | radeon_pm.c | 178 clock_info[rdev->pm.requested_clock_mode_index].sclk; in radeon_set_power_state()
192 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
195 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
311 struct radeon_pm_clock_info *clock_info; in radeon_pm_print_states() local
326 clock_info = &(power_state->clock_info[j]); in radeon_pm_print_states()
330 clock_info->sclk * 10); in radeon_pm_print_states()
334 clock_info->sclk * 10, in radeon_pm_print_states()
335 clock_info->mclk * 10, in radeon_pm_print_states()
336 clock_info->voltage.voltage); in radeon_pm_print_states()
1232 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol… in radeon_pm_resume_old()
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| D | trinity_dpm.c | 1708 union pplib_clock_info *clock_info) in trinity_parse_pplib_clock_info() argument
1715 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in trinity_parse_pplib_clock_info()
1716 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in trinity_parse_pplib_clock_info()
1718 pl->vddc_index = clock_info->sumo.vddcIndex; in trinity_parse_pplib_clock_info()
1734 union pplib_clock_info *clock_info; in trinity_parse_power_table() local
1771 if (!rdev->pm.power_state[i].clock_info) in trinity_parse_power_table()
1787 clock_info = (union pplib_clock_info *) in trinity_parse_power_table()
1792 clock_info); in trinity_parse_power_table()
1806 clock_info = (union pplib_clock_info *) in trinity_parse_power_table()
1808 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in trinity_parse_power_table()
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| D | rv6xx_dpm.c | 1819 union pplib_clock_info *clock_info) in rv6xx_parse_pplib_clock_info() argument
1839 sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); in rv6xx_parse_pplib_clock_info()
1840 sclk |= clock_info->r600.ucEngineClockHigh << 16; in rv6xx_parse_pplib_clock_info()
1841 mclk = le16_to_cpu(clock_info->r600.usMemoryClockLow); in rv6xx_parse_pplib_clock_info()
1842 mclk |= clock_info->r600.ucMemoryClockHigh << 16; in rv6xx_parse_pplib_clock_info()
1846 pl->vddc = le16_to_cpu(clock_info->r600.usVDDC); in rv6xx_parse_pplib_clock_info()
1847 pl->flags = le32_to_cpu(clock_info->r600.ulFlags); in rv6xx_parse_pplib_clock_info()
1879 union pplib_clock_info *clock_info; in rv6xx_parse_power_table() local
1918 clock_info = (union pplib_clock_info *) in rv6xx_parse_power_table()
1924 clock_info); in rv6xx_parse_power_table()
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| D | sumo_dpm.c | 1432 union pplib_clock_info *clock_info) in sumo_parse_pplib_clock_info() argument
1439 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in sumo_parse_pplib_clock_info()
1440 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in sumo_parse_pplib_clock_info()
1442 pl->vddc_index = clock_info->sumo.vddcIndex; in sumo_parse_pplib_clock_info()
1443 pl->sclk_dpm_tdp_limit = clock_info->sumo.tdpLimit; in sumo_parse_pplib_clock_info()
1459 union pplib_clock_info *clock_info; in sumo_parse_power_table() local
1496 if (!rdev->pm.power_state[i].clock_info) in sumo_parse_power_table()
1511 clock_info = (union pplib_clock_info *) in sumo_parse_power_table()
1516 clock_info); in sumo_parse_power_table()
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| D | kv_dpm.c | 2611 union pplib_clock_info *clock_info) in kv_parse_pplib_clock_info() argument
2618 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_pplib_clock_info()
2619 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_pplib_clock_info()
2621 pl->vddc_index = clock_info->sumo.vddcIndex; in kv_parse_pplib_clock_info()
2637 union pplib_clock_info *clock_info; in kv_parse_power_table() local
2674 if (!rdev->pm.power_state[i].clock_info) in kv_parse_power_table()
2690 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2695 clock_info); in kv_parse_power_table()
2709 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2711 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_power_table()
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| D | si_dpm.c | 6782 union pplib_clock_info *clock_info) in si_parse_pplib_clock_info() argument
6794 pl->sclk = le16_to_cpu(clock_info->si.usEngineClockLow); in si_parse_pplib_clock_info()
6795 pl->sclk |= clock_info->si.ucEngineClockHigh << 16; in si_parse_pplib_clock_info()
6796 pl->mclk = le16_to_cpu(clock_info->si.usMemoryClockLow); in si_parse_pplib_clock_info()
6797 pl->mclk |= clock_info->si.ucMemoryClockHigh << 16; in si_parse_pplib_clock_info()
6799 pl->vddc = le16_to_cpu(clock_info->si.usVDDC); in si_parse_pplib_clock_info()
6800 pl->vddci = le16_to_cpu(clock_info->si.usVDDCI); in si_parse_pplib_clock_info()
6801 pl->flags = le32_to_cpu(clock_info->si.ulFlags); in si_parse_pplib_clock_info()
6805 clock_info->si.ucPCIEGen); in si_parse_pplib_clock_info()
6862 union pplib_clock_info *clock_info; in si_parse_power_table() local
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| D | ci_dpm.c | 5447 union pplib_clock_info *clock_info) in ci_parse_pplib_clock_info() argument
5455 pl->sclk = le16_to_cpu(clock_info->ci.usEngineClockLow); in ci_parse_pplib_clock_info()
5456 pl->sclk |= clock_info->ci.ucEngineClockHigh << 16; in ci_parse_pplib_clock_info()
5457 pl->mclk = le16_to_cpu(clock_info->ci.usMemoryClockLow); in ci_parse_pplib_clock_info()
5458 pl->mclk |= clock_info->ci.ucMemoryClockHigh << 16; in ci_parse_pplib_clock_info()
5463 clock_info->ci.ucPCIEGen); in ci_parse_pplib_clock_info()
5466 le16_to_cpu(clock_info->ci.usPCIELane)); in ci_parse_pplib_clock_info()
5520 union pplib_clock_info *clock_info; in ci_parse_power_table() local
5558 if (!rdev->pm.power_state[i].clock_info) in ci_parse_power_table()
5575 clock_info = (union pplib_clock_info *) in ci_parse_power_table()
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| D | ni_dpm.c | 3922 union pplib_clock_info *clock_info) in ni_parse_pplib_clock_info() argument
3931 pl->sclk = le16_to_cpu(clock_info->evergreen.usEngineClockLow); in ni_parse_pplib_clock_info()
3932 pl->sclk |= clock_info->evergreen.ucEngineClockHigh << 16; in ni_parse_pplib_clock_info()
3933 pl->mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow); in ni_parse_pplib_clock_info()
3934 pl->mclk |= clock_info->evergreen.ucMemoryClockHigh << 16; in ni_parse_pplib_clock_info()
3936 pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC); in ni_parse_pplib_clock_info()
3937 pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI); in ni_parse_pplib_clock_info()
3938 pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags); in ni_parse_pplib_clock_info()
3991 union pplib_clock_info *clock_info; in ni_parse_power_table() local
4031 clock_info = (union pplib_clock_info *) in ni_parse_power_table()
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| D | r600.c | 407 clock_info[rdev->pm.requested_clock_mode_index].flags & in r600_pm_get_dynpm_state()
488 clock_info[rdev->pm.requested_clock_mode_index].flags & in r600_pm_get_dynpm_state()
522 clock_info[rdev->pm.requested_clock_mode_index].sclk, in r600_pm_get_dynpm_state()
524 clock_info[rdev->pm.requested_clock_mode_index].mclk, in r600_pm_get_dynpm_state()
775 struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage; in r600_pm_misc()
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| D | r100.c | 241 (rdev->pm.power_state[rdev->pm.requested_power_state_index].clock_info[0].flags & in r100_pm_get_dynpm_state()
282 clock_info[rdev->pm.requested_clock_mode_index].sclk, in r100_pm_get_dynpm_state()
284 clock_info[rdev->pm.requested_clock_mode_index].mclk, in r100_pm_get_dynpm_state()
349 struct radeon_voltage *voltage = &ps->clock_info[0].voltage; in r100_pm_misc()
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| D | rs600.c | 219 struct radeon_voltage *voltage = &ps->clock_info[0].voltage; in rs600_pm_misc()
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| /drivers/clk/ingenic/ |
| D | cgu.c | 89 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_pll_recalc_rate()
163 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_pll_round_rate()
182 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_pll_set_rate()
243 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_get_parent()
272 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_set_parent()
321 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_recalc_rate()
360 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_round_rate()
383 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_set_rate()
437 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_enable()
456 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_clk_disable()
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| D | cgu.h | 179 const struct ingenic_cgu_clk_info *clock_info; member
210 ingenic_cgu_new(const struct ingenic_cgu_clk_info *clock_info,
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| /drivers/video/fbdev/omap2/dss/ |
| D | sdi.c | 160 sdi.mgr_config.clock_info = dispc_cinfo; in sdi_display_enable()
191 dispc_mgr_set_clock_div(out->manager->id, &sdi.mgr_config.clock_info); in sdi_display_enable()
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| D | manager.c | 198 struct dispc_clock_info cinfo = config->clock_info; in dss_mgr_check_lcd_config()
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| D | dpi.c | 301 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_dsi_clk()
325 dpi->mgr_config.clock_info = ctx.dispc_cinfo; in dpi_set_dispc_clk()
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| D | dss.h | 191 struct dispc_clock_info clock_info; member
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| D | apply.c | 185 mp->lcd_config.clock_info.lck_div = 1; in apply_init_priv()
186 mp->lcd_config.clock_info.pck_div = 1; in apply_init_priv()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | kv_dpm.c | 2708 union pplib_clock_info *clock_info) in kv_parse_pplib_clock_info() argument
2715 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_pplib_clock_info()
2716 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_pplib_clock_info()
2718 pl->vddc_index = clock_info->sumo.vddcIndex; in kv_parse_pplib_clock_info()
2734 union pplib_clock_info *clock_info; in kv_parse_power_table() local
2787 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2792 clock_info); in kv_parse_power_table()
2806 clock_info = (union pplib_clock_info *) in kv_parse_power_table()
2808 sclk = le16_to_cpu(clock_info->sumo.usEngineClockLow); in kv_parse_power_table()
2809 sclk |= clock_info->sumo.ucEngineClockHigh << 16; in kv_parse_power_table()
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| D | cz_dpm.c | 238 union pplib_clock_info *clock_info) in cz_parse_pplib_clock_info() argument
246 pl->sclk = table->entries[clock_info->carrizo.index].clk; in cz_parse_pplib_clock_info()
247 pl->vddc_index = table->entries[clock_info->carrizo.index].v; in cz_parse_pplib_clock_info()
305 union pplib_clock_info *clock_info; in cz_parse_power_table() local
365 clock_info = (union pplib_clock_info *) in cz_parse_power_table()
369 k, clock_info); in cz_parse_power_table()
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| D | ci_dpm.c | 5593 union pplib_clock_info *clock_info) in ci_parse_pplib_clock_info() argument
5601 pl->sclk = le16_to_cpu(clock_info->ci.usEngineClockLow); in ci_parse_pplib_clock_info()
5602 pl->sclk |= clock_info->ci.ucEngineClockHigh << 16; in ci_parse_pplib_clock_info()
5603 pl->mclk = le16_to_cpu(clock_info->ci.usMemoryClockLow); in ci_parse_pplib_clock_info()
5604 pl->mclk |= clock_info->ci.ucMemoryClockHigh << 16; in ci_parse_pplib_clock_info()
5609 clock_info->ci.ucPCIEGen); in ci_parse_pplib_clock_info()
5612 le16_to_cpu(clock_info->ci.usPCIELane)); in ci_parse_pplib_clock_info()
5666 union pplib_clock_info *clock_info; in ci_parse_power_table() local
5722 clock_info = (union pplib_clock_info *) in ci_parse_power_table()
5727 clock_info); in ci_parse_power_table()
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