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Searched refs:ctr (Results 1 – 25 of 68) sorted by relevance

123

/drivers/isdn/capi/
Dkcapi.c79 capi_ctr_get(struct capi_ctr *ctr) in capi_ctr_get() argument
81 if (!try_module_get(ctr->owner)) in capi_ctr_get()
83 return ctr; in capi_ctr_get()
87 capi_ctr_put(struct capi_ctr *ctr) in capi_ctr_put() argument
89 module_put(ctr->owner); in capi_ctr_put()
160 register_appl(struct capi_ctr *ctr, u16 applid, capi_register_params *rparam) in register_appl() argument
162 ctr = capi_ctr_get(ctr); in register_appl()
164 if (ctr) in register_appl()
165 ctr->register_appl(ctr, applid, rparam); in register_appl()
172 static void release_appl(struct capi_ctr *ctr, u16 applid) in release_appl() argument
[all …]
Dkcapi_proc.c66 struct capi_ctr *ctr = *(struct capi_ctr **) v; in controller_show() local
68 if (!ctr) in controller_show()
72 ctr->cnr, ctr->driver_name, in controller_show()
73 state2str(ctr->state), in controller_show()
74 ctr->name, in controller_show()
75 ctr->procinfo ? ctr->procinfo(ctr) : ""); in controller_show()
82 struct capi_ctr *ctr = *(struct capi_ctr **) v; in contrstats_show() local
84 if (!ctr) in contrstats_show()
88 ctr->cnr, in contrstats_show()
89 ctr->nrecvctlpkt, in contrstats_show()
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/pm/
Dnv40.c28 struct nvkm_perfctr *ctr) in nv40_perfctr_init() argument
31 u32 log = ctr->logic_op; in nv40_perfctr_init()
36 src |= ctr->signal[i] << (i * 8); in nv40_perfctr_init()
39 nvkm_wr32(device, 0x00a400 + dom->addr + (ctr->slot * 0x40), src); in nv40_perfctr_init()
40 nvkm_wr32(device, 0x00a420 + dom->addr + (ctr->slot * 0x40), log); in nv40_perfctr_init()
45 struct nvkm_perfctr *ctr) in nv40_perfctr_read() argument
49 switch (ctr->slot) { in nv40_perfctr_read()
50 case 0: ctr->ctr = nvkm_rd32(device, 0x00a700 + dom->addr); break; in nv40_perfctr_read()
51 case 1: ctr->ctr = nvkm_rd32(device, 0x00a6c0 + dom->addr); break; in nv40_perfctr_read()
52 case 2: ctr->ctr = nvkm_rd32(device, 0x00a680 + dom->addr); break; in nv40_perfctr_read()
[all …]
Dgf100.c129 struct nvkm_perfctr *ctr) in gf100_perfctr_init() argument
132 u32 log = ctr->logic_op; in gf100_perfctr_init()
137 src |= ctr->signal[i] << (i * 8); in gf100_perfctr_init()
141 nvkm_wr32(device, dom->addr + 0x040 + (ctr->slot * 0x08), src); in gf100_perfctr_init()
142 nvkm_wr32(device, dom->addr + 0x044 + (ctr->slot * 0x08), log); in gf100_perfctr_init()
147 struct nvkm_perfctr *ctr) in gf100_perfctr_read() argument
151 switch (ctr->slot) { in gf100_perfctr_read()
152 case 0: ctr->ctr = nvkm_rd32(device, dom->addr + 0x08c); break; in gf100_perfctr_read()
153 case 1: ctr->ctr = nvkm_rd32(device, dom->addr + 0x088); break; in gf100_perfctr_read()
154 case 2: ctr->ctr = nvkm_rd32(device, dom->addr + 0x080); break; in gf100_perfctr_read()
[all …]
Dbase.c127 nvkm_perfsrc_enable(struct nvkm_pm *pm, struct nvkm_perfctr *ctr) in nvkm_perfsrc_enable() argument
138 for (j = 0; j < 8 && ctr->source[i][j]; j++) { in nvkm_perfsrc_enable()
139 sig = nvkm_perfsig_find(pm, ctr->domain, in nvkm_perfsrc_enable()
140 ctr->signal[i], &dom); in nvkm_perfsrc_enable()
144 src = nvkm_perfsrc_find(pm, sig, ctr->source[i][j]); in nvkm_perfsrc_enable()
153 value |= ((ctr->source[i][j] >> 32) << src->shift); in nvkm_perfsrc_enable()
166 nvkm_perfsrc_disable(struct nvkm_pm *pm, struct nvkm_perfctr *ctr) in nvkm_perfsrc_disable() argument
177 for (j = 0; j < 8 && ctr->source[i][j]; j++) { in nvkm_perfsrc_disable()
178 sig = nvkm_perfsig_find(pm, ctr->domain, in nvkm_perfsrc_disable()
179 ctr->signal[i], &dom); in nvkm_perfsrc_disable()
[all …]
Dpriv.h20 u32 ctr; member
77 struct nvkm_perfctr *ctr[4]; member
/drivers/parport/
Dparport_gsc.h67 unsigned char ctr; member
110 unsigned char ctr = priv->ctr; in __parport_gsc_frob_control() local
114 mask, val, ctr, ((ctr & ~mask) ^ val) & priv->ctr_writable); in __parport_gsc_frob_control()
116 ctr = (ctr & ~mask) ^ val; in __parport_gsc_frob_control()
117 ctr &= priv->ctr_writable; /* only write writable bits. */ in __parport_gsc_frob_control()
118 parport_writeb (ctr, CONTROL (p)); in __parport_gsc_frob_control()
119 priv->ctr = ctr; /* Update soft copy */ in __parport_gsc_frob_control()
120 return ctr; in __parport_gsc_frob_control()
158 return priv->ctr & rm; /* Use soft copy */ in parport_gsc_read_control()
Dparport_gsc.c85 s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0); in parport_gsc_init_state()
90 s->u.pc.ctr = parport_readb (CONTROL (p)); in parport_gsc_save_state()
95 parport_writeb (s->u.pc.ctr, CONTROL (p)); in parport_gsc_restore_state()
257 priv->ctr = 0xc; in parport_gsc_probe_port()
Dparport_sunbpp.c217 s->u.pc.ctr = 0xc; in parport_sunbpp_init_state()
223 s->u.pc.ctr = parport_sunbpp_read_control(p); in parport_sunbpp_save_state()
228 parport_sunbpp_write_control(p, s->u.pc.ctr); in parport_sunbpp_restore_state()
/drivers/isdn/gigaset/
Dcapi.c94 struct capi_ctr ctr; member
326 static void send_data_b3_conf(struct cardstate *cs, struct capi_ctr *ctr, in send_data_b3_conf() argument
345 CAPIMSG_SETCONTROLLER(msg, ctr->cnr); in send_data_b3_conf()
353 capi_ctr_handle_message(ctr, appl, cskb); in send_data_b3_conf()
398 send_data_b3_conf(cs, &iif->ctr, ap->id, CAPIMSG_MSGID(req), in gigaset_skb_sent()
449 CAPIMSG_SETCONTROLLER(skb->data, iif->ctr.cnr); in gigaset_skb_rcvd()
460 capi_ctr_handle_message(&iif->ctr, ap->id, skb); in gigaset_skb_rcvd()
518 iif->ctr.cnr | ((bcs->channel + 1) << 8)); in gigaset_isdn_icall()
668 capi_ctr_handle_message(&iif->ctr, ap->id, skb); in gigaset_isdn_icall()
695 iif->ctr.cnr | ((bcs->channel + 1) << 8)); in send_disconnect_ind()
[all …]
/drivers/net/wireless/ath/ath6kl/
Dcore.c265 u8 ctr; in ath6kl_core_create() local
302 for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) { in ath6kl_core_create()
303 spin_lock_init(&ar->sta_list[ctr].psq_lock); in ath6kl_core_create()
304 skb_queue_head_init(&ar->sta_list[ctr].psq); in ath6kl_core_create()
305 skb_queue_head_init(&ar->sta_list[ctr].apsdq); in ath6kl_core_create()
306 ar->sta_list[ctr].mgmt_psq_len = 0; in ath6kl_core_create()
307 INIT_LIST_HEAD(&ar->sta_list[ctr].mgmt_psq); in ath6kl_core_create()
308 ar->sta_list[ctr].aggr_conn = in ath6kl_core_create()
310 if (!ar->sta_list[ctr].aggr_conn) { in ath6kl_core_create()
/drivers/crypto/qat/qat_common/
Dqat_crypto.c106 unsigned long ctr; in qat_crypto_get_instance_node() local
114 ctr = atomic_read(&tmp_dev->ref_count); in qat_crypto_get_instance_node()
115 if (best > ctr) { in qat_crypto_get_instance_node()
117 best = ctr; in qat_crypto_get_instance_node()
143 unsigned long ctr; in qat_crypto_get_instance_node() local
146 ctr = atomic_read(&tmp_inst->refctr); in qat_crypto_get_instance_node()
147 if (best > ctr) { in qat_crypto_get_instance_node()
149 best = ctr; in qat_crypto_get_instance_node()
/drivers/watchdog/
Dwdt.c101 static void wdt_ctr_mode(int ctr, int mode) in wdt_ctr_mode() argument
103 ctr <<= 6; in wdt_ctr_mode()
104 ctr |= 0x30; in wdt_ctr_mode()
105 ctr |= (mode << 1); in wdt_ctr_mode()
106 outb_p(ctr, WDT_CR); in wdt_ctr_mode()
109 static void wdt_ctr_load(int ctr, int val) in wdt_ctr_load() argument
111 outb_p(val&0xFF, WDT_COUNT0+ctr); in wdt_ctr_load()
112 outb_p(val>>8, WDT_COUNT0+ctr); in wdt_ctr_load()
Dwdt_pci.c102 static void wdtpci_ctr_mode(int ctr, int mode) in wdtpci_ctr_mode() argument
104 ctr <<= 6; in wdtpci_ctr_mode()
105 ctr |= 0x30; in wdtpci_ctr_mode()
106 ctr |= (mode << 1); in wdtpci_ctr_mode()
107 outb(ctr, WDT_CR); in wdtpci_ctr_mode()
111 static void wdtpci_ctr_load(int ctr, int val) in wdtpci_ctr_load() argument
113 outb(val & 0xFF, WDT_COUNT0 + ctr); in wdtpci_ctr_load()
115 outb(val >> 8, WDT_COUNT0 + ctr); in wdtpci_ctr_load()
/drivers/crypto/qat/qat_dh895xcc/
Dadf_dh895xcc_hw_data.c85 uint32_t i, ctr = 0; in get_num_accels() local
92 ctr++; in get_num_accels()
94 return ctr; in get_num_accels()
99 uint32_t i, ctr = 0; in get_num_aes() local
106 ctr++; in get_num_aes()
108 return ctr; in get_num_aes()
/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_minidump.c407 struct __ctrl *ctr = &entry->region.ctrl; in qlcnic_dump_ctrl() local
412 addr = ctr->addr; in qlcnic_dump_ctrl()
413 no_ops = ctr->no_ops; in qlcnic_dump_ctrl()
418 if (!(ctr->opcode & (1 << k))) in qlcnic_dump_ctrl()
422 qlcnic_ind_wr(adapter, addr, ctr->val1); in qlcnic_dump_ctrl()
431 (data & ctr->val2)); in qlcnic_dump_ctrl()
436 (data | ctr->val3)); in qlcnic_dump_ctrl()
439 while (timeout <= ctr->timeout) { in qlcnic_dump_ctrl()
441 if ((data & ctr->val2) == ctr->val1) in qlcnic_dump_ctrl()
446 if (timeout > ctr->timeout) { in qlcnic_dump_ctrl()
[all …]
/drivers/ps3/
Dps3-lpm.c315 u32 ps3_read_ctr(u32 cpu, u32 ctr) in ps3_read_ctr() argument
318 u32 phys_ctr = ctr & (NR_PHYS_CTRS - 1); in ps3_read_ctr()
323 val = (ctr < NR_PHYS_CTRS) ? (val >> 16) : (val & 0xffff); in ps3_read_ctr()
336 void ps3_write_ctr(u32 cpu, u32 ctr, u32 val) in ps3_write_ctr() argument
341 phys_ctr = ctr & (NR_PHYS_CTRS - 1); in ps3_write_ctr()
346 if (ctr < NR_PHYS_CTRS) in ps3_write_ctr()
362 u32 ps3_read_pm07_control(u32 cpu, u32 ctr) in ps3_read_pm07_control() argument
374 void ps3_write_pm07_control(u32 cpu, u32 ctr, u32 val) in ps3_write_pm07_control() argument
380 if (ctr >= NR_CTRS) { in ps3_write_pm07_control()
382 __LINE__, ctr); in ps3_write_pm07_control()
[all …]
/drivers/tty/serial/
Dsuncore.c206 static int ctr = 0; in suncore_mouse_baud_detection() local
212 if (mouse_got_break && ctr < 8) in suncore_mouse_baud_detection()
216 ctr = 0; in suncore_mouse_baud_detection()
221 ctr++; in suncore_mouse_baud_detection()
/drivers/media/pci/cobalt/
Dcobalt-i2c.c34 u8 ctr; member
336 iowrite8(0, &regs->ctr); in cobalt_i2c_init()
352 iowrite8(0, &regs->ctr); in cobalt_i2c_init()
359 iowrite8(M00018_CTR_BITMAP_EN_MSK, &regs->ctr); in cobalt_i2c_init()
/drivers/staging/lustre/lnet/lnet/
Dapi-ni.c319 lnet_counters_t *ctr; in lnet_counters_get() local
326 cfs_percpt_for_each(ctr, i, the_lnet.ln_counters) { in lnet_counters_get()
327 counters->msgs_max += ctr->msgs_max; in lnet_counters_get()
328 counters->msgs_alloc += ctr->msgs_alloc; in lnet_counters_get()
329 counters->errors += ctr->errors; in lnet_counters_get()
330 counters->send_count += ctr->send_count; in lnet_counters_get()
331 counters->recv_count += ctr->recv_count; in lnet_counters_get()
332 counters->route_count += ctr->route_count; in lnet_counters_get()
333 counters->drop_count += ctr->drop_count; in lnet_counters_get()
334 counters->send_length += ctr->send_length; in lnet_counters_get()
[all …]
/drivers/md/
Ddm-snap-transient.c106 .ctr = transient_ctr,
118 .ctr = transient_ctr,
/drivers/net/ethernet/mellanox/mlx5/core/
Dwq.h94 static inline u16 mlx5_wq_cyc_ctr2ix(struct mlx5_wq_cyc *wq, u16 ctr) in mlx5_wq_cyc_ctr2ix() argument
96 return ctr & wq->sz_m1; in mlx5_wq_cyc_ctr2ix()
/drivers/firmware/
Dqcom_scm-32.c232 u32 cacheline_size, ctr; in qcom_scm_inv_range() local
234 asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr)); in qcom_scm_inv_range()
235 cacheline_size = 4 << ((ctr >> 16) & 0xf); in qcom_scm_inv_range()
/drivers/crypto/nx/
Dnx-aes-ctr.c75 memcpy(nx_ctx->priv.ctr.nonce, in ctr3686_aes_nx_set_key()
136 memcpy(iv, nx_ctx->priv.ctr.nonce, CTR_RFC3686_IV_SIZE); in ctr3686_aes_nx_crypt()
/drivers/staging/lustre/lustre/obdclass/
Dlprocfs_status.c1142 struct lprocfs_counter ctr; in lprocfs_stats_seq_show() local
1155 lprocfs_stats_collect(stats, idx, &ctr); in lprocfs_stats_seq_show()
1157 if (ctr.lc_count != 0) { in lprocfs_stats_seq_show()
1159 hdr->lc_name, ctr.lc_count, hdr->lc_units); in lprocfs_stats_seq_show()
1162 (ctr.lc_count > 0)) { in lprocfs_stats_seq_show()
1164 ctr.lc_min, ctr.lc_max, ctr.lc_sum); in lprocfs_stats_seq_show()
1166 seq_printf(p, " %lld", ctr.lc_sumsquare); in lprocfs_stats_seq_show()

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