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Searched refs:dsaf_read_dev (Results 1 – 7 of 7) sorted by relevance

/drivers/net/ethernet/hisilicon/hns/
Dhns_dsaf_gmac.c100 porten = dsaf_read_dev(drv, GMAC_PORT_EN_REG); in hns_gmac_get_en()
164 tx_loop_pkt_pri = dsaf_read_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG); in hns_gmac_tx_loop_pkt_dis()
205 tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG); in hns_gmac_port_mode_get()
206 recv_ctrl = dsaf_read_dev(drv, GMAC_RECV_CONTROL_REG); in hns_gmac_port_mode_get()
232 pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG); in hns_gmac_pause_frm_cfg()
244 pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG); in hns_gmac_get_pausefrm_cfg()
282 tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG); in hns_gmac_adjust_link()
319 += dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_OK_REG); in hns_gmac_update_stats()
321 += dsaf_read_dev(drv, GMAC_RX_OCTETS_BAD_REG); in hns_gmac_update_stats()
322 hw_stats->rx_uc_pkts += dsaf_read_dev(drv, GMAC_RX_UC_PKTS_REG); in hns_gmac_update_stats()
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Dhns_dsaf_ppe.c163 u32 qid_mod = dsaf_read_dev(ppe_common, PPE_COM_CFG_QID_MODE_REG); in hns_ppe_set_qid()
359 += dsaf_read_dev(ppe_cb, PPE_HIS_RX_SW_PKT_CNT_REG); in hns_ppe_update_stats()
361 += dsaf_read_dev(ppe_cb, PPE_HIS_RX_WR_BD_OK_PKT_CNT_REG); in hns_ppe_update_stats()
363 += dsaf_read_dev(ppe_cb, PPE_HIS_RX_PKT_NO_BUF_CNT_REG); in hns_ppe_update_stats()
365 += dsaf_read_dev(ppe_cb, PPE_HIS_RX_APP_BUF_FAIL_CNT_REG); in hns_ppe_update_stats()
367 += dsaf_read_dev(ppe_cb, PPE_HIS_RX_APP_BUF_WAIT_CNT_REG); in hns_ppe_update_stats()
369 += dsaf_read_dev(ppe_cb, PPE_HIS_RX_PKT_DROP_FUL_CNT_REG); in hns_ppe_update_stats()
371 += dsaf_read_dev(ppe_cb, PPE_HIS_RX_PKT_DROP_PRT_CNT_REG); in hns_ppe_update_stats()
374 += dsaf_read_dev(ppe_cb, PPE_HIS_TX_BD_CNT_REG); in hns_ppe_update_stats()
376 += dsaf_read_dev(ppe_cb, PPE_HIS_TX_PKT_CNT_REG); in hns_ppe_update_stats()
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Dhns_dsaf_main.c287 o_sbm_cfg = dsaf_read_dev(dsaf_dev, in hns_dsaf_sbm_cfg()
351 o_sbm_bp_cfg0 = dsaf_read_dev(dsaf_dev, reg); in hns_dsaf_sbm_bp_wl_cfg()
361 o_sbm_bp_cfg1 = dsaf_read_dev(dsaf_dev, reg); in hns_dsaf_sbm_bp_wl_cfg()
369 o_sbm_bp_cfg2 = dsaf_read_dev(dsaf_dev, reg); in hns_dsaf_sbm_bp_wl_cfg()
377 o_sbm_bp_cfg3 = dsaf_read_dev(dsaf_dev, reg); in hns_dsaf_sbm_bp_wl_cfg()
388 o_sbm_bp_cfg3 = dsaf_read_dev(dsaf_dev, reg); in hns_dsaf_sbm_bp_wl_cfg()
401 o_sbm_bp_cfg2 = dsaf_read_dev(dsaf_dev, reg); in hns_dsaf_sbm_bp_wl_cfg()
412 o_sbm_bp_cfg2 = dsaf_read_dev(dsaf_dev, reg); in hns_dsaf_sbm_bp_wl_cfg()
431 voq_bp_all_thrd = dsaf_read_dev( in hns_dsaf_voq_bp_all_thrd_cfg()
480 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG); in hns_dsaf_tbl_tcam_mcast_cfg()
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Dhns_dsaf_rcb.c50 fbd_num += dsaf_read_dev(qs[i], in hns_rcb_wait_fbd_clean()
53 fbd_num += dsaf_read_dev(qs[i], in hns_rcb_wait_fbd_clean()
80 tx_fbd_num = dsaf_read_dev(q, RCB_RING_TX_RING_FBDNUM_REG); in hns_rcb_reset_ring_hw()
89 could_ret = dsaf_read_dev(q, RCB_RING_COULD_BE_RST); in hns_rcb_reset_ring_hw()
98 could_ret = dsaf_read_dev(q, RCB_RING_COULD_BE_RST); in hns_rcb_reset_ring_hw()
275 return dsaf_read_dev(rcb_common, in hns_rcb_get_port_coalesced_frames()
340 reg_val = dsaf_read_dev(rcb_common, RCB_COM_CFG_INIT_FLAG_REG); in hns_rcb_common_init_hw()
737 hw_stats->rx_pkts += dsaf_read_dev(queue, in hns_rcb_update_stats()
741 hw_stats->ppe_rx_ok_pkts += dsaf_read_dev(ppe_common, in hns_rcb_update_stats()
743 hw_stats->ppe_rx_drop_pkts += dsaf_read_dev(ppe_common, in hns_rcb_update_stats()
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Dhns_dsaf_xgmac.c173 u32 origin = dsaf_read_dev(drv, XGMAC_PMA_FEC_CONTROL_REG); in hns_xgmac_pma_fec_enable()
221 u32 origin = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG); in hns_xgmac_config_pad_and_crc()
237 u32 origin = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG); in hns_xgmac_pausefrm_cfg()
441 ctrl_val = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG); in hns_xgmac_get_info()
445 pause_time = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG); in hns_xgmac_get_info()
448 port_mode = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG); in hns_xgmac_get_info()
456 pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG); in hns_xgmac_get_info()
472 pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG); in hns_xgmac_get_pausefrm_cfg()
486 *link_stat = dsaf_read_dev(drv, XGMAC_LINK_STATUS_REG); in hns_xgmac_get_link_status()
503 regs[0] = dsaf_read_dev(drv, XGMAC_INT_STATUS_REG); in hns_xgmac_get_regs()
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Dhns_dsaf_main.h354 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); in hns_dsaf_tbl_tcam_load_pul()
Dhns_dsaf_reg.h914 #define dsaf_read_dev(a, reg) \ macro