| /drivers/gpu/drm/radeon/ |
| D | uvd_v3_1.c | 43 bool emit_wait) in uvd_v3_1_semaphore_emit() argument
54 radeon_ring_write(ring, 0x80 | (emit_wait ? 1 : 0)); in uvd_v3_1_semaphore_emit()
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| D | uvd_v2_2.c | 75 bool emit_wait) in uvd_v2_2_semaphore_emit() argument
86 radeon_ring_write(ring, emit_wait ? 1 : 0); in uvd_v2_2_semaphore_emit()
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| D | radeon_asic.h | 81 bool emit_wait);
327 bool emit_wait);
333 bool emit_wait);
793 bool emit_wait);
813 bool emit_wait);
947 bool emit_wait);
957 bool emit_wait);
963 bool emit_wait);
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| D | r600_dma.c | 316 bool emit_wait) in r600_dma_semaphore_ring_emit() argument
319 u32 s = emit_wait ? 0 : 1; in r600_dma_semaphore_ring_emit()
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| D | radeon_vce.c | 698 bool emit_wait) in radeon_vce_semaphore_emit() argument
705 radeon_ring_write(ring, cpu_to_le32(0x01003000 | (emit_wait ? 1 : 0))); in radeon_vce_semaphore_emit()
706 if (!emit_wait) in radeon_vce_semaphore_emit()
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| D | cik_sdma.c | 231 bool emit_wait) in cik_sdma_semaphore_ring_emit() argument
234 u32 extra_bits = emit_wait ? 0 : SDMA_SEMAPHORE_EXTRA_S; in cik_sdma_semaphore_ring_emit()
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| D | uvd_v1_0.c | 467 bool emit_wait) in uvd_v1_0_semaphore_emit() argument
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| D | radeon.h | 1744 bool emit_wait);
1831 struct radeon_semaphore *semaphore, bool emit_wait);
2746 …ng_emit(rdev, r, cp, semaphore, emit_wait) (rdev)->asic->ring[(r)]->emit_semaphore((rdev), (cp), (… argument
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| D | r600.c | 2926 bool emit_wait) in r600_semaphore_ring_emit() argument
2929 unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL; in r600_semaphore_ring_emit()
2939 if (emit_wait && (rdev->family >= CHIP_CEDAR)) { in r600_semaphore_ring_emit()
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| D | cik.c | 4009 bool emit_wait) in cik_semaphore_ring_emit() argument
4012 unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL; in cik_semaphore_ring_emit()
4018 if (emit_wait && ring->idx == RADEON_RING_TYPE_GFX_INDEX) { in cik_semaphore_ring_emit()
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| D | r100.c | 875 bool emit_wait) in r100_semaphore_ring_emit() argument
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_vce.h | 39 bool emit_wait);
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| D | amdgpu_vce.c | 765 bool emit_wait) in amdgpu_vce_ring_emit_semaphore() argument
772 amdgpu_ring_write(ring, 0x01003000 | (emit_wait ? 1 : 0)); in amdgpu_vce_ring_emit_semaphore()
773 if (!emit_wait) in amdgpu_vce_ring_emit_semaphore()
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| D | uvd_v5_0.c | 496 bool emit_wait) in uvd_v5_0_ring_emit_semaphore() argument
507 amdgpu_ring_write(ring, 0x80 | (emit_wait ? 1 : 0)); in uvd_v5_0_ring_emit_semaphore()
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| D | uvd_v6_0.c | 496 bool emit_wait) in uvd_v6_0_ring_emit_semaphore() argument
507 amdgpu_ring_write(ring, 0x80 | (emit_wait ? 1 : 0)); in uvd_v6_0_ring_emit_semaphore()
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| D | uvd_v4_2.c | 452 bool emit_wait) in uvd_v4_2_ring_emit_semaphore() argument
463 amdgpu_ring_write(ring, 0x80 | (emit_wait ? 1 : 0)); in uvd_v4_2_ring_emit_semaphore()
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| D | cik_sdma.c | 310 bool emit_wait) in cik_sdma_ring_emit_semaphore() argument
313 u32 extra_bits = emit_wait ? 0 : SDMA_SEMAPHORE_EXTRA_S; in cik_sdma_ring_emit_semaphore()
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| D | sdma_v2_4.c | 349 bool emit_wait) in sdma_v2_4_ring_emit_semaphore() argument
352 u32 sig = emit_wait ? 0 : 1; in sdma_v2_4_ring_emit_semaphore()
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| D | sdma_v3_0.c | 460 bool emit_wait) in sdma_v3_0_ring_emit_semaphore() argument
463 u32 sig = emit_wait ? 0 : 1; in sdma_v3_0_ring_emit_semaphore()
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| D | amdgpu.h | 337 bool emit_wait);
2256 …e amdgpu_ring_emit_semaphore(r, semaphore, emit_wait) (r)->funcs->emit_semaphore((r), (semaphore),… argument
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| D | gfx_v7_0.c | 2505 bool emit_wait) in gfx_v7_0_ring_emit_semaphore() argument
2508 unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL; in gfx_v7_0_ring_emit_semaphore()
2514 if (emit_wait && (ring->type == AMDGPU_RING_TYPE_GFX)) { in gfx_v7_0_ring_emit_semaphore()
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| D | gfx_v8_0.c | 4649 bool emit_wait) in gfx_v8_0_ring_emit_semaphore() argument
4652 unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL; in gfx_v8_0_ring_emit_semaphore()
4666 if (emit_wait && (ring->type == AMDGPU_RING_TYPE_GFX)) { in gfx_v8_0_ring_emit_semaphore()
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