/drivers/gpu/drm/ |
D | drm_modes.c | 55 mode->hdisplay, mode->hsync_start, in drm_mode_debug_printmodeline() 149 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, in drm_cvt_mode() argument 187 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); in drm_cvt_mode() 196 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; in drm_cvt_mode() 218 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) in drm_cvt_mode() 220 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) in drm_cvt_mode() 222 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) in drm_cvt_mode() 224 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) in drm_cvt_mode() 226 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) in drm_cvt_mode() 278 hblank = drm_mode->hdisplay * hblank_percentage / in drm_cvt_mode() [all …]
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D | drm_edid.c | 1465 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 1522 return (mode->htotal - mode->hdisplay == 160) && in mode_is_rb() 1523 (mode->hsync_end - mode->hdisplay == 80) && in mode_is_rb() 1548 if (hsize != ptr->hdisplay) in drm_mode_find_dmt() 1775 if (m->hdisplay == hsize && m->vdisplay == vsize && in drm_mode_std() 1783 mode->hdisplay = 1366; in drm_mode_std() 1863 if ((mode->hdisplay == cea_interlaced[i].w) && in drm_mode_do_interlace_quirk() 1938 mode->hdisplay = hactive; in drm_mode_detailed() 1939 mode->hsync_start = mode->hdisplay + hsync_offset; in drm_mode_detailed() 1941 mode->htotal = mode->hdisplay + hblank; in drm_mode_detailed() [all …]
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/drivers/gpu/drm/panel/ |
D | panel-simple.c | 127 m->hdisplay, m->vdisplay, m->vrefresh); in panel_simple_get_fixed_modes() 376 .hdisplay = 800, 401 .hdisplay = 1024, 424 .hdisplay = 1280, 447 .hdisplay = 1366, 471 .hdisplay = 1366, 494 .hdisplay = 1366, 517 .hdisplay = 1920, 545 .hdisplay = 1024, 573 .hdisplay = 1366, [all …]
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D | panel-sharp-lq101r1sx01.c | 142 err = mipi_dsi_dcs_set_column_address(left, 0, mode->hdisplay / 2 - 1); in sharp_setup_symmetrical_split() 154 err = mipi_dsi_dcs_set_column_address(right, mode->hdisplay / 2, in sharp_setup_symmetrical_split() 155 mode->hdisplay - 1); in sharp_setup_symmetrical_split() 278 .hdisplay = 2560, 296 default_mode.hdisplay, default_mode.vdisplay, in sharp_panel_get_modes()
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/drivers/gpu/drm/gma500/ |
D | mdfld_tpo_vid.c | 42 mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo; in tpo_vid_get_config_mode() 44 mode->hsync_start = mode->hdisplay + in tpo_vid_get_config_mode() 50 mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | in tpo_vid_get_config_mode() 62 dev_dbg(dev->dev, "hdisplay is %d\n", mode->hdisplay); in tpo_vid_get_config_mode() 72 mode->hdisplay = 864; in tpo_vid_get_config_mode()
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D | mdfld_tmd_vid.c | 45 mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo; in tmd_vid_get_config_mode() 47 mode->hsync_start = mode->hdisplay + \ in tmd_vid_get_config_mode() 53 mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \ in tmd_vid_get_config_mode() 65 dev_dbg(dev->dev, "hdisplay is %d\n", mode->hdisplay); in tmd_vid_get_config_mode() 75 mode->hdisplay = 480; in tmd_vid_get_config_mode()
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D | oaktrail_lvds.c | 144 (mode->hdisplay != adjusted_mode->crtc_hdisplay)) { in oaktrail_lvds_mode_set() 146 (mode->hdisplay * adjusted_mode->crtc_vdisplay)) in oaktrail_lvds_mode_set() 149 mode->vdisplay) > (mode->hdisplay * in oaktrail_lvds_mode_set() 238 mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo; in oaktrail_lvds_get_configuration_mode() 240 mode->hsync_start = mode->hdisplay + \ in oaktrail_lvds_get_configuration_mode() 246 mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \ in oaktrail_lvds_get_configuration_mode() 258 printk(KERN_INFO "hdisplay is %d\n", mode->hdisplay); in oaktrail_lvds_get_configuration_mode()
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D | cdv_intel_lvds.c | 264 if (mode->hdisplay > fixed_mode->hdisplay) in cdv_intel_lvds_mode_valid() 300 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; in cdv_intel_lvds_mode_fixup() 373 if (mode->hdisplay != adjusted_mode->hdisplay || in cdv_intel_lvds_mode_set() 491 if (crtc->saved_mode.hdisplay != 0 && in cdv_intel_lvds_set_property()
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D | mdfld_dsi_dpi.c | 435 pclk_hactive = mode->hdisplay; in mdfld_dsi_dpi_timing_calculation() 436 pclk_hfp = mode->hsync_start - mode->hdisplay; in mdfld_dsi_dpi_timing_calculation() 519 mode->vdisplay << 16 | mode->hdisplay); in mdfld_dsi_dpi_controller_init() 696 adjusted_mode->hdisplay = fixed_mode->hdisplay; in mdfld_dsi_dpi_mode_fixup() 753 mode->vdisplay << 16 | mode->hdisplay); in mdfld_mipi_set_video_timing() 797 REG_WRITE(HTOTAL_A, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); in mdfld_set_pipe_timing() 798 REG_WRITE(HBLANK_A, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); in mdfld_set_pipe_timing() 808 ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1)); in mdfld_set_pipe_timing() 877 ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); in mdfld_dsi_dpi_mode_set()
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D | psb_intel_lvds.c | 366 if (mode->hdisplay > fixed_mode->hdisplay) in psb_intel_lvds_mode_valid() 416 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; in psb_intel_lvds_mode_fixup() 488 if (mode->hdisplay != adjusted_mode->hdisplay || in psb_intel_lvds_mode_set() 611 if (crtc->saved_mode.hdisplay != 0 && in psb_intel_lvds_set_property()
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/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_encoders.c | 152 unsigned hblank = native_mode->htotal - native_mode->hdisplay; in amdgpu_panel_mode_fixup() 154 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; in amdgpu_panel_mode_fixup() 162 adjusted_mode->hdisplay = native_mode->hdisplay; in amdgpu_panel_mode_fixup() 165 adjusted_mode->htotal = native_mode->hdisplay + hblank; in amdgpu_panel_mode_fixup() 166 adjusted_mode->hsync_start = native_mode->hdisplay + hover; in amdgpu_panel_mode_fixup() 175 adjusted_mode->crtc_hdisplay = native_mode->hdisplay; in amdgpu_panel_mode_fixup()
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D | amdgpu_connectors.c | 403 if (native_mode->hdisplay != 0 && in amdgpu_connector_lcd_native_mode() 414 } else if (native_mode->hdisplay != 0 && in amdgpu_connector_lcd_native_mode() 423 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); in amdgpu_connector_lcd_native_mode() 471 if (common_modes[i].w > native_mode->hdisplay || in amdgpu_connector_add_common_modes() 473 (common_modes[i].w == native_mode->hdisplay && in amdgpu_connector_add_common_modes() 641 if (mode->hdisplay != native_mode->hdisplay || in amdgpu_connector_fixup_lcd_native_mode() 650 if (mode->hdisplay == native_mode->hdisplay && in amdgpu_connector_fixup_lcd_native_mode() 708 if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) in amdgpu_connector_lvds_mode_valid() 718 if ((mode->hdisplay > native_mode->hdisplay) || in amdgpu_connector_lvds_mode_valid() 724 if ((mode->hdisplay != native_mode->hdisplay) || in amdgpu_connector_lvds_mode_valid() [all …]
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D | amdgpu_display.c | 679 if ((mode->vdisplay == 480 && mode->hdisplay == 720) || /* 480p */ in is_hdtv_mode() 714 else if (mode->hdisplay < amdgpu_encoder->native_mode.hdisplay || in amdgpu_crtc_scaling_mode_fixup() 725 src_h = crtc->mode.hdisplay; in amdgpu_crtc_scaling_mode_fixup() 726 dst_h = amdgpu_crtc->native_mode.hdisplay; in amdgpu_crtc_scaling_mode_fixup() 737 amdgpu_crtc->h_border = (mode->hdisplay >> 5) + 16; in amdgpu_crtc_scaling_mode_fixup() 745 src_h = crtc->mode.hdisplay; in amdgpu_crtc_scaling_mode_fixup() 746 dst_h = crtc->mode.hdisplay - (amdgpu_crtc->h_border * 2); in amdgpu_crtc_scaling_mode_fixup()
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/drivers/gpu/drm/nouveau/dispnv04/ |
D | tvnv17.c | 207 for (tv_mode = nv17_tv_modes; tv_mode->hdisplay; tv_mode++) { in nv17_tv_get_ld_modes() 219 if (mode->hdisplay == tv_norm->tv_enc_mode.hdisplay && in nv17_tv_get_ld_modes() 237 int hdisplay; in nv17_tv_get_hd_modes() member 253 if (modes[i].hdisplay > output_mode->hdisplay || in nv17_tv_get_hd_modes() 257 if (modes[i].hdisplay == output_mode->hdisplay && in nv17_tv_get_hd_modes() 263 mode = drm_cvt_mode(encoder->dev, modes[i].hdisplay, in nv17_tv_get_hd_modes() 270 if (output_mode->hdisplay <= 720 in nv17_tv_get_hd_modes() 271 || output_mode->hdisplay >= 1920) { in nv17_tv_get_hd_modes() 273 mode->hsync_start = (mode->hdisplay + (mode->htotal in nv17_tv_get_hd_modes() 274 - mode->hdisplay) * 9 / 10) & ~7; in nv17_tv_get_hd_modes() [all …]
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D | dfp.c | 191 mode->hdisplay > nv_connector->native_mode->hdisplay || in nv04_dfp_mode_fixup() 299 regp->fp_horiz_regs[FP_DISPLAY_END] = output_mode->hdisplay - 1; in nv04_dfp_mode_set() 302 (output_mode->hsync_start - output_mode->hdisplay) >= in nv04_dfp_mode_set() 304 regp->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay; in nv04_dfp_mode_set() 310 regp->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - 1; in nv04_dfp_mode_set() 333 else if (adjusted_mode->hdisplay == output_mode->hdisplay && in nv04_dfp_mode_set() 373 mode_ratio = (1 << 12) * adjusted_mode->hdisplay / adjusted_mode->vdisplay; in nv04_dfp_mode_set() 374 panel_ratio = (1 << 12) * output_mode->hdisplay / output_mode->vdisplay; in nv04_dfp_mode_set() 392 diff = output_mode->hdisplay - in nv04_dfp_mode_set() 403 scale = (1 << 12) * adjusted_mode->hdisplay / output_mode->hdisplay; in nv04_dfp_mode_set() [all …]
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D | tvmodesnv17.c | 326 uint64_t rs[] = {mode->hdisplay * id3, in tv_setup_filter() 329 do_div(rs[0], overscan * tv_norm->tv_enc_mode.hdisplay); in tv_setup_filter() 560 hmargin = (output_mode->hdisplay - crtc_mode->hdisplay) / 2; in nv17_ctv_update_rescaler() 563 hmargin = interpolate(0, min(hmargin, output_mode->hdisplay/20), in nv17_ctv_update_rescaler() 568 hratio = crtc_mode->hdisplay * 0x800 / in nv17_ctv_update_rescaler() 569 (output_mode->hdisplay - 2*hmargin); in nv17_ctv_update_rescaler() 574 regs->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - hmargin - 1; in nv17_ctv_update_rescaler()
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/drivers/gpu/drm/virtio/ |
D | virtgpu_display.c | 149 crtc->mode.hdisplay, crtc->mode.vdisplay); in virtio_gpu_page_flip() 153 cpu_to_le32(crtc->mode.hdisplay), in virtio_gpu_page_flip() 158 crtc->mode.hdisplay, in virtio_gpu_page_flip() 161 crtc->mode.hdisplay, in virtio_gpu_page_flip() 254 crtc->mode.hdisplay, in virtio_gpu_crtc_mode_set_nofb() 345 if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF) in virtio_gpu_conn_mode_valid() 347 if (mode->hdisplay <= width && mode->hdisplay >= width - 16 && in virtio_gpu_conn_mode_valid() 351 DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay); in virtio_gpu_conn_mode_valid()
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/drivers/gpu/drm/tilcdc/ |
D | tilcdc_crtc.c | 303 hfp = mode->hsync_start - mode->hdisplay; in tilcdc_crtc_mode_set() 310 mode->hdisplay, mode->vdisplay, hbp, hfp, hsw, vbp, vfp, vsw); in tilcdc_crtc_mode_set() 330 reg = (((mode->hdisplay >> 4) - 1) << 4) | in tilcdc_crtc_mode_set() 335 reg |= (((mode->hdisplay >> 4) - 1) & 0x40) >> 3; in tilcdc_crtc_mode_set() 477 if (mode->hdisplay > tilcdc_crtc_max_width(crtc)) in tilcdc_crtc_mode_valid() 481 if (mode->hdisplay & 0xf) in tilcdc_crtc_mode_valid() 488 mode->hdisplay, mode->vdisplay, in tilcdc_crtc_mode_valid() 492 hfp = mode->hsync_start - mode->hdisplay; in tilcdc_crtc_mode_valid() 541 if (mode->hdisplay > priv->max_width) in tilcdc_crtc_mode_valid() 545 bandwidth = mode->hdisplay * mode->vdisplay * in tilcdc_crtc_mode_valid()
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/drivers/gpu/drm/radeon/ |
D | radeon_encoders.c | 326 unsigned hblank = native_mode->htotal - native_mode->hdisplay; in radeon_panel_mode_fixup() 328 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; in radeon_panel_mode_fixup() 337 adjusted_mode->hdisplay = native_mode->hdisplay; in radeon_panel_mode_fixup() 341 adjusted_mode->htotal = native_mode->hdisplay + hblank; in radeon_panel_mode_fixup() 342 adjusted_mode->hsync_start = native_mode->hdisplay + hover; in radeon_panel_mode_fixup() 352 adjusted_mode->crtc_hdisplay = native_mode->hdisplay; in radeon_panel_mode_fixup()
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D | radeon_connectors.c | 482 if (native_mode->hdisplay != 0 && in radeon_fp_native_mode() 490 } else if (native_mode->hdisplay != 0 && in radeon_fp_native_mode() 499 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); in radeon_fp_native_mode() 543 if (common_modes[i].w > native_mode->hdisplay || in radeon_add_common_modes() 545 (common_modes[i].w == native_mode->hdisplay && in radeon_add_common_modes() 785 if (mode->hdisplay != native_mode->hdisplay || in radeon_fixup_lvds_native_mode() 794 if (mode->hdisplay == native_mode->hdisplay && in radeon_fixup_lvds_native_mode() 852 if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) in radeon_lvds_mode_valid() 862 if ((mode->hdisplay > native_mode->hdisplay) || in radeon_lvds_mode_valid() 868 if ((mode->hdisplay != native_mode->hdisplay) || in radeon_lvds_mode_valid() [all …]
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/drivers/gpu/drm/i915/ |
D | dvo_ns2501.c | 531 mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); in ns2501_mode_valid() 539 if ((mode->hdisplay == 640 && mode->vdisplay == 480 && mode->clock == 25175) || in ns2501_mode_valid() 540 (mode->hdisplay == 800 && mode->vdisplay == 600 && mode->clock == 40000) || in ns2501_mode_valid() 541 (mode->hdisplay == 1024 && mode->vdisplay == 768 && mode->clock == 65000)) { in ns2501_mode_valid() 558 mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); in ns2501_mode_set() 590 if (mode->hdisplay == 640 && mode->vdisplay == 480) in ns2501_mode_set() 592 else if (mode->hdisplay == 800 && mode->vdisplay == 600) in ns2501_mode_set() 594 else if (mode->hdisplay == 1024 && mode->vdisplay == 768) in ns2501_mode_set()
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D | dvo_ch7017.c | 301 horizontal_active_pixel_input = mode->hdisplay & 0x00ff; in ch7017_mode_set() 304 horizontal_active_pixel_output = mode->hdisplay & 0x00ff; in ch7017_mode_set() 306 active_input_line_output = ((mode->hdisplay & 0x0700) >> 8) | in ch7017_mode_set() 310 (mode->hdisplay & 0x0700) >> 8; in ch7017_mode_set()
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/drivers/gpu/drm/omapdrm/ |
D | omap_connector.c | 51 mode->hdisplay = timings->x_res; in copy_timings_omap_to_drm() 52 mode->hsync_start = mode->hdisplay + timings->hfp; in copy_timings_omap_to_drm() 82 timings->x_res = mode->hdisplay; in copy_timings_drm_to_omap() 83 timings->hfp = mode->hsync_start - mode->hdisplay; in copy_timings_drm_to_omap() 247 mode->hdisplay, mode->hsync_start, in omap_connector_mode_valid()
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/drivers/gpu/drm/nouveau/ |
D | nouveau_connector.c | 629 if (mode->hdisplay < high_w) in nouveau_connector_native_mode() 632 if (mode->hdisplay == high_w && mode->vdisplay < high_h) in nouveau_connector_native_mode() 635 if (mode->hdisplay == high_w && mode->vdisplay == high_h && in nouveau_connector_native_mode() 639 high_w = mode->hdisplay; in nouveau_connector_native_mode() 651 int hdisplay; member 685 while (mode->hdisplay) { in nouveau_connector_scaler_modes_add() 686 if (mode->hdisplay <= native->hdisplay && in nouveau_connector_scaler_modes_add() 688 (mode->hdisplay != native->hdisplay || in nouveau_connector_scaler_modes_add() 690 m = drm_cvt_mode(dev, mode->hdisplay, mode->vdisplay, in nouveau_connector_scaler_modes_add() 854 (mode->hdisplay > nv_connector->native_mode->hdisplay || in nouveau_connector_mode_valid()
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/drivers/gpu/drm/exynos/ |
D | exynos_hdmi.c | 1015 mode->hdisplay, mode->vdisplay, mode->vrefresh, in hdmi_mode_valid() 1099 m->hdisplay, m->vdisplay, m->vrefresh); in hdmi_mode_fixup() 1301 hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay); in hdmi_v13_mode_apply() 1311 val = (m->hsync_start - m->hdisplay - 2); in hdmi_v13_mode_apply() 1312 val |= ((m->hsync_end - m->hdisplay - 2) << 10); in hdmi_v13_mode_apply() 1342 val = ((m->htotal / 2) + (m->hsync_start - m->hdisplay)); in hdmi_v13_mode_apply() 1344 (m->hsync_start - m->hdisplay)) << 12; in hdmi_v13_mode_apply() 1375 hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay); in hdmi_v13_mode_apply() 1376 hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay); in hdmi_v13_mode_apply() 1391 hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay); in hdmi_v14_mode_apply() [all …]
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