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Searched refs:hdmi_read (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/msm/hdmi/
Dhdmi_hdcp.c212 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_INT_CTRL); in hdmi_hdcp_irq()
237 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS); in hdmi_hdcp_irq()
297 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS); in reset_hdcp_ddc_failures()
318 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_CTRL_1); in reset_hdcp_ddc_failures()
323 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS); in reset_hdcp_ddc_failures()
334 hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS)); in reset_hdcp_ddc_failures()
336 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); in reset_hdcp_ddc_failures()
342 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); in reset_hdcp_ddc_failures()
347 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); in reset_hdcp_ddc_failures()
355 reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL); in reset_hdcp_ddc_failures()
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Dhdmi_i2c.c64 ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL); in ddc_clear_irq()
87 ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL); in sw_done()
116 WARN_ON(!(hdmi_read(hdmi, REG_HDMI_CTRL) & HDMI_CTRL_ENABLE)); in hdmi_i2c_xfer()
180 hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS), in hdmi_i2c_xfer()
181 hdmi_read(hdmi, REG_HDMI_DDC_HW_STATUS), in hdmi_i2c_xfer()
182 hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL)); in hdmi_i2c_xfer()
186 ddc_status = hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS); in hdmi_i2c_xfer()
208 hdmi_read(hdmi, REG_HDMI_DDC_DATA); in hdmi_i2c_xfer()
211 ddc_data = hdmi_read(hdmi, REG_HDMI_DDC_DATA); in hdmi_i2c_xfer()
Dhdmi_audio.c122 acr_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_ACR_PKT_CTRL); in hdmi_audio_update()
123 vbi_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_VBI_PKT_CTRL); in hdmi_audio_update()
124 aud_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_AUDIO_PKT_CTRL1); in hdmi_audio_update()
125 infofrm_ctrl = hdmi_read(hdmi, REG_HDMI_INFOFRAME_CTRL0); in hdmi_audio_update()
126 audio_config = hdmi_read(hdmi, REG_HDMI_AUDIO_CFG); in hdmi_audio_update()
Dhdmi_phy_8960.c276 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_REG12); in hdmi_pll_enable()
290 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_REG12); in hdmi_pll_enable()
297 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_PLL_PWRDN_B); in hdmi_pll_enable()
307 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_PLL_STATUS0); in hdmi_pll_enable()
345 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_REG12); in hdmi_pll_disable()
349 val = hdmi_read(hdmi, REG_HDMI_8960_PHY_PLL_PWRDN_B); in hdmi_pll_disable()
Dhdmi_connector.c35 val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL); in hdmi_phy_reset()
255 hpd_ctrl = hdmi_read(hdmi, REG_HDMI_HPD_CTRL); in hpd_enable()
318 hpd_int_status = hdmi_read(hdmi, REG_HDMI_HPD_INT_STATUS); in hdmi_connector_irq()
319 hpd_int_ctrl = hdmi_read(hdmi, REG_HDMI_HPD_INT_CTRL); in hdmi_connector_irq()
343 uint32_t hpd_int_status = hdmi_read(hdmi, REG_HDMI_HPD_INT_STATUS); in detect_reg()
406 hdmi_ctrl = hdmi_read(hdmi, REG_HDMI_CTRL); in hdmi_connector_get_modes()
Dhdmi.h124 static inline u32 hdmi_read(struct hdmi *hdmi, u32 reg) in hdmi_read() function
/drivers/media/i2c/
Dadv7842.c530 static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg) in hdmi_read() function
546 return hdmi_write(sd, reg, (hdmi_read(sd, reg) & mask) | val); in hdmi_write_and_or()
916 reg->val = hdmi_read(sd, reg->reg & 0xff); in adv7842_g_register()
1200 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80; in set_rgb_quantization_range()
1374 return hdmi_read(sd, 0x05) & 0x80; in is_hdmi()
1564 bt->width = (hdmi_read(sd, 0x07) & 0x0f) * 256 + hdmi_read(sd, 0x08); in adv7842_query_dv_timings()
1565 bt->height = (hdmi_read(sd, 0x09) & 0x0f) * 256 + hdmi_read(sd, 0x0a); in adv7842_query_dv_timings()
1566 freq = ((hdmi_read(sd, 0x51) << 1) + (hdmi_read(sd, 0x52) >> 7)) * 1000000; in adv7842_query_dv_timings()
1567 freq += ((hdmi_read(sd, 0x52) & 0x7f) * 7813); in adv7842_query_dv_timings()
1570 freq = freq * 8 / (((hdmi_read(sd, 0x0b) & 0xc0) >> 6) * 2 + 8); in adv7842_query_dv_timings()
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Dadv7604.c573 static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg) in hdmi_read() function
582 return ((hdmi_read(sd, reg) << 8) | hdmi_read(sd, reg + 1)) & mask; in hdmi_read16()
594 return hdmi_write(sd, reg, (hdmi_read(sd, reg) & ~mask) | val); in hdmi_write_clr_set()
1087 bool hdmi_signal = hdmi_read(sd, 0x05) & 0x80; in set_rgb_quantization_range()
1244 return hdmi_read(sd, 0x05) & 0x80; in is_hdmi()
1397 polarity = hdmi_read(sd, 0x05); in read_stdi()
1494 a = hdmi_read(sd, 0x06); in adv7604_read_hdmi_pixelclock()
1495 b = hdmi_read(sd, 0x3b); in adv7604_read_hdmi_pixelclock()
1502 unsigned bits_per_channel = ((hdmi_read(sd, 0x0b) & 0x60) >> 4) + 8; in adv7604_read_hdmi_pixelclock()
1514 a = hdmi_read(sd, 0x51); in adv7611_read_hdmi_pixelclock()
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/drivers/gpu/drm/sti/
Dsti_hdmi.c125 u32 hdmi_read(struct sti_hdmi *hdmi, int offset) in hdmi_read() function
174 hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA); in hdmi_irq()
180 hdmi_read(hdmi, HDMI_INT_STA); in hdmi_irq()
299 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); in hdmi_infoframe_write_infopack()
323 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); in hdmi_infoframe_write_infopack()
426 val = hdmi_read(hdmi, HDMI_CFG); in hdmi_swreset()
440 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0) in hdmi_swreset()
443 val = hdmi_read(hdmi, HDMI_CFG); in hdmi_swreset()
455 u32 val = hdmi_read(hdmi, HDMI_CFG); in sti_hdmi_disable()
Dsti_hdmi_tx3g4c28phy.c124 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) == 0) { in sti_hdmi_tx3g4c28phy_start()
204 if (hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) in sti_hdmi_tx3g4c28phy_stop()
Dsti_hdmi_tx3g0c55phy.c255 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) == 0) { in sti_hdmi_tx3g0c55phy_start()
327 if (hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) in sti_hdmi_tx3g0c55phy_stop()
Dsti_hdmi.h69 u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
/drivers/media/platform/s5p-tv/
Dhdmi_drv.c151 static inline u32 hdmi_read(struct hdmi_device *hdev, u32 reg_id) in hdmi_read() function
162 intc_flag = hdmi_read(hdev, HDMI_INTC_FLAG); in hdmi_irq_handler()
514 u32 val = hdmi_read(hdev, HDMI_PHY_STATUS); in hdmi_streamon()