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Searched refs:high_water (Results 1 – 16 of 16) sorted by relevance

/drivers/net/ethernet/intel/ixgb/
Dixgb_param.c361 adapter->hw.fc.high_water = RxFCHighThresh[bd]; in ixgb_check_options()
362 ixgb_validate_option(&adapter->hw.fc.high_water, &opt); in ixgb_check_options()
364 adapter->hw.fc.high_water = opt.def; in ixgb_check_options()
411 if (adapter->hw.fc.high_water < (adapter->hw.fc.low_water + 8)) { in ixgb_check_options()
414 adapter->hw.fc.high_water = DEFAULT_FCRTH; in ixgb_check_options()
Dixgb_hw.h639 u32 high_water; /* Flow Control High-water */ member
Dixgb_hw.c718 IXGB_WRITE_REG(hw, FCRTH, hw->fc.high_water); in ixgb_setup_fc()
/drivers/atm/
Dzatm.c212 while (free < zatm_dev->pool_info[pool].high_water) { in refill_pool()
617 zatm_dev->pool_info[i].high_water = HIGH_MARK; in start_rx()
1492 if (!info.high_water) in zatm_ioctl()
1493 info.high_water = zatm_dev-> in zatm_ioctl()
1494 pool_info[pool].high_water; in zatm_ioctl()
1498 if (info.low_water >= info.high_water || in zatm_ioctl()
1504 zatm_dev->pool_info[pool].high_water = in zatm_ioctl()
1505 info.high_water; in zatm_ioctl()
/drivers/net/ethernet/intel/ixgbe/
Dixgbe_82598.c340 hw->fc.high_water[i]) { in ixgbe_fc_enable_82598()
342 hw->fc.low_water[i] >= hw->fc.high_water[i]) { in ixgbe_fc_enable_82598()
432 hw->fc.high_water[i]) { in ixgbe_fc_enable_82598()
434 fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_fc_enable_82598()
Dixgbe_dcb_82598.c220 reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_dcb_config_pfc_82598()
Dixgbe_dcb_82599.c258 reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_dcb_config_pfc_82599()
Dixgbe_common.c2096 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2098 hw->fc.low_water[i] >= hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2168 hw->fc.high_water[i]) { in ixgbe_fc_enable_generic()
2171 fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_fc_enable_generic()
Dixgbe_type.h3126 u32 high_water[MAX_TRAFFIC_CLASS]; /* Flow Control High-water */ member
Dixgbe_main.c4502 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i); in ixgbe_pbthresh_setup()
4506 if (hw->fc.low_water[i] > hw->fc.high_water[i]) in ixgbe_pbthresh_setup()
4511 hw->fc.high_water[i] = 0; in ixgbe_pbthresh_setup()
/drivers/net/ethernet/intel/igb/
De1000_hw.h482 u32 high_water; /* Flow control high-water mark */ member
De1000_mac.c693 fcrth = hw->fc.high_water; in igb_set_fc_watermarks()
Digb_main.c1954 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */ in igb_reset()
1955 fc->low_water = fc->high_water - 16; in igb_reset()
/drivers/net/ethernet/intel/e1000e/
Dhw.h632 u32 high_water; /* Flow control high-water mark */ member
Dnetdev.c3996 fc->high_water = 0x2800; in e1000e_reset()
3997 fc->low_water = fc->high_water - 8; in e1000e_reset()
4005 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */ in e1000e_reset()
4006 fc->low_water = fc->high_water - 8; in e1000e_reset()
4013 fc->high_water = 0x3500; in e1000e_reset()
4016 fc->high_water = 0x5000; in e1000e_reset()
4027 fc->high_water = 0x05C20; in e1000e_reset()
4035 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH; in e1000e_reset()
Dmac.c946 fcrth = hw->fc.high_water; in e1000e_set_fc_watermarks()