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Searched refs:hw_mode (Results 1 – 19 of 19) sorted by relevance

/drivers/spi/
Dspi-fsl-spi.c94 if (cs->hw_mode == mpc8xxx_spi_read_reg(mode)) in fsl_spi_change_mode()
101 mpc8xxx_spi_write_reg(mode, cs->hw_mode & ~SPMODE_ENABLE); in fsl_spi_change_mode()
107 mpc8xxx_spi_write_reg(mode, cs->hw_mode); in fsl_spi_change_mode()
262 cs->hw_mode &= ~(SPMODE_LEN(0xF) | SPMODE_DIV16 in fsl_spi_setup_transfer()
265 cs->hw_mode |= SPMODE_LEN(bits_per_word); in fsl_spi_setup_transfer()
268 cs->hw_mode |= SPMODE_DIV16; in fsl_spi_setup_transfer()
282 cs->hw_mode |= SPMODE_PM(pm); in fsl_spi_setup_transfer()
427 u32 hw_mode; in fsl_spi_setup() local
443 hw_mode = cs->hw_mode; /* Save original settings */ in fsl_spi_setup()
444 cs->hw_mode = mpc8xxx_spi_read_reg(&reg_base->mode); in fsl_spi_setup()
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Dspi-fsl-espi.c107 mpc8xxx_spi_write_reg(mode, cs->hw_mode); in fsl_espi_change_mode()
175 cs->hw_mode &= ~(CSMODE_LEN(0xF) | CSMODE_DIV16 | CSMODE_PM(0xF)); in fsl_espi_setup_transfer()
177 cs->hw_mode |= CSMODE_LEN(bits_per_word); in fsl_espi_setup_transfer()
180 cs->hw_mode |= CSMODE_DIV16; in fsl_espi_setup_transfer()
196 cs->hw_mode |= CSMODE_PM(pm); in fsl_espi_setup_transfer()
474 u32 hw_mode; in fsl_espi_setup() local
493 hw_mode = cs->hw_mode; /* Save original settings */ in fsl_espi_setup()
494 cs->hw_mode = mpc8xxx_spi_read_reg( in fsl_espi_setup()
497 cs->hw_mode &= ~(CSMODE_CP_BEGIN_EDGECLK | CSMODE_CI_INACTIVEHIGH in fsl_espi_setup()
501 cs->hw_mode |= CSMODE_CP_BEGIN_EDGECLK; in fsl_espi_setup()
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Dspi-fsl-lib.h86 u32 hw_mode; /* Holds HW mode register settings */ member
/drivers/net/ethernet/qlogic/qed/
Dqed_dev.c397 int hw_mode = 0; in qed_calc_hw_mode() local
399 hw_mode = (1 << MODE_BB_A0); in qed_calc_hw_mode()
403 hw_mode |= 1 << MODE_PORTS_PER_ENG_1; in qed_calc_hw_mode()
406 hw_mode |= 1 << MODE_PORTS_PER_ENG_2; in qed_calc_hw_mode()
409 hw_mode |= 1 << MODE_PORTS_PER_ENG_4; in qed_calc_hw_mode()
419 hw_mode |= 1 << MODE_SF; in qed_calc_hw_mode()
422 hw_mode |= 1 << MODE_MF_SD; in qed_calc_hw_mode()
425 hw_mode |= 1 << MODE_MF_SI; in qed_calc_hw_mode()
429 hw_mode |= 1 << MODE_SF; in qed_calc_hw_mode()
432 hw_mode |= 1 << MODE_ASIC; in qed_calc_hw_mode()
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Dqed.h153 u32 hw_mode; member
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_dpm.c128 if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { in amdgpu_dpm_get_vblank_time()
130 amdgpu_crtc->hw_mode.crtc_htotal * in amdgpu_dpm_get_vblank_time()
131 (amdgpu_crtc->hw_mode.crtc_vblank_end - in amdgpu_dpm_get_vblank_time()
132 amdgpu_crtc->hw_mode.crtc_vdisplay + in amdgpu_dpm_get_vblank_time()
135 vblank_time_us = vblank_in_pixels * 1000 / amdgpu_crtc->hw_mode.clock; in amdgpu_dpm_get_vblank_time()
154 if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) { in amdgpu_dpm_get_vrefresh()
155 vrefresh = drm_mode_vrefresh(&amdgpu_crtc->hw_mode); in amdgpu_dpm_get_vrefresh()
Duvd_v4_2.c662 bool hw_mode = true; in uvd_v4_2_init_cg() local
664 if (hw_mode) { in uvd_v4_2_init_cg()
Damdgpu_mode.h411 struct drm_display_mode hw_mode; member
Ddce_v8_0.c2750 amdgpu_crtc->hw_mode = *adjusted_mode; in dce_v8_0_crtc_mode_set()
Ddce_v10_0.c2804 amdgpu_crtc->hw_mode = *adjusted_mode; in dce_v10_0_crtc_mode_set()
Ddce_v11_0.c2793 amdgpu_crtc->hw_mode = *adjusted_mode; in dce_v11_0_crtc_mode_set()
/drivers/net/ethernet/ti/
Ddavinci_cpdma.c76 u32 hw_mode; member
652 mode = desc_read(prev, hw_mode); in __cpdma_chan_submit()
655 desc_write(prev, hw_mode, mode & ~CPDMA_DESC_EOQ); in __cpdma_chan_submit()
704 desc_write(desc, hw_mode, mode | len); in cpdma_chan_submit()
784 status = __raw_readl(&desc->hw_mode); in __cpdma_chan_process()
/drivers/gpu/drm/radeon/
Dr600_dpm.c165 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { in r600_dpm_get_vblank_time()
167 radeon_crtc->hw_mode.crtc_htotal * in r600_dpm_get_vblank_time()
168 (radeon_crtc->hw_mode.crtc_vblank_end - in r600_dpm_get_vblank_time()
169 radeon_crtc->hw_mode.crtc_vdisplay + in r600_dpm_get_vblank_time()
172 vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock; in r600_dpm_get_vblank_time()
191 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { in r600_dpm_get_vrefresh()
192 vrefresh = drm_mode_vrefresh(&radeon_crtc->hw_mode); in r600_dpm_get_vrefresh()
Dradeon_mode.h372 struct drm_display_mode hw_mode; member
Datombios_crtc.c2071 radeon_crtc->hw_mode = *adjusted_mode; in atombios_crtc_mode_set()
Dsi.c5181 bool hw_mode = true; in si_init_uvd_internal_cg() local
5183 if (hw_mode) { in si_init_uvd_internal_cg()
/drivers/usb/host/
Dimx21-hcd.c1701 u32 hw_mode = USBOTG_HWMODE_CRECFG_HOST; in imx21_hc_start() local
1704 hw_mode |= ((imx21->pdata->host_xcvr << USBOTG_HWMODE_HOSTXCVR_SHIFT) & in imx21_hc_start()
1706 hw_mode |= ((imx21->pdata->otg_xcvr << USBOTG_HWMODE_OTGXCVR_SHIFT) & in imx21_hc_start()
1723 writel(hw_mode, imx21->regs + USBOTG_HWMODE); in imx21_hc_start()
/drivers/staging/rtl8723au/include/
Drtw_mlme_ext.h396 enum hw_mode {IEEE80211G, IEEE80211A} mode; enum
/drivers/staging/rtl8188eu/include/
Drtw_mlme_ext.h401 enum hw_mode {IEEE80211G} mode; enum