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Searched refs:interrupt_mask (Results 1 – 12 of 12) sorted by relevance

/drivers/net/wireless/ath/ath5k/
Ddma.c527 ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask) in ath5k_hw_get_isr() argument
541 *interrupt_mask = isr; in ath5k_hw_get_isr()
549 *interrupt_mask = (isr & AR5K_INT_COMMON) & ah->ah_imr; in ath5k_hw_get_isr()
554 *interrupt_mask |= AR5K_INT_FATAL; in ath5k_hw_get_isr()
577 *interrupt_mask = pisr; in ath5k_hw_get_isr()
651 *interrupt_mask = (pisr & AR5K_INT_COMMON) & ah->ah_imr; in ath5k_hw_get_isr()
684 *interrupt_mask |= AR5K_INT_TIM; in ath5k_hw_get_isr()
689 *interrupt_mask |= AR5K_INT_TIM; in ath5k_hw_get_isr()
691 *interrupt_mask |= AR5K_INT_DTIM; in ath5k_hw_get_isr()
693 *interrupt_mask |= AR5K_INT_DTIM_SYNC; in ath5k_hw_get_isr()
[all …]
Dath5k.h1520 int ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask);
/drivers/irqchip/
Dirq-moxart.c41 unsigned int interrupt_mask; member
92 &intc.interrupt_mask); in moxart_of_intc_init()
109 writel(intc.interrupt_mask, intc.base + IRQ_MODE_REG); in moxart_of_intc_init()
110 writel(intc.interrupt_mask, intc.base + IRQ_LEVEL_REG); in moxart_of_intc_init()
Dirq-vic.c523 u32 interrupt_mask = ~0; in vic_of_init() local
533 of_property_read_u32(node, "valid-mask", &interrupt_mask); in vic_of_init()
539 __vic_init(regs, 0, 0, interrupt_mask, wakeup_mask, node); in vic_of_init()
/drivers/ps3/
Dps3-vuart.c79 u64 interrupt_mask; member
268 priv->interrupt_mask = mask; in ps3_vuart_set_interrupt_mask()
271 PARAM_INTERRUPT_MASK, priv->interrupt_mask); in ps3_vuart_set_interrupt_mask()
294 *status = tmp & priv->interrupt_mask; in ps3_vuart_get_interrupt_status()
297 __func__, __LINE__, priv->interrupt_mask, tmp, *status); in ps3_vuart_get_interrupt_status()
306 return (priv->interrupt_mask & INTERRUPT_MASK_TX) ? 0 in ps3_vuart_enable_interrupt_tx()
307 : ps3_vuart_set_interrupt_mask(dev, priv->interrupt_mask in ps3_vuart_enable_interrupt_tx()
315 return (priv->interrupt_mask & INTERRUPT_MASK_RX) ? 0 in ps3_vuart_enable_interrupt_rx()
316 : ps3_vuart_set_interrupt_mask(dev, priv->interrupt_mask in ps3_vuart_enable_interrupt_rx()
324 return (priv->interrupt_mask & INTERRUPT_MASK_DISCONNECT) ? 0 in ps3_vuart_enable_interrupt_disconnect()
[all …]
/drivers/hv/
Dring_buffer.c35 rbi->ring_buffer->interrupt_mask = 1; in hv_begin_read()
44 rbi->ring_buffer->interrupt_mask = 0; in hv_end_read()
76 if (rbi->ring_buffer->interrupt_mask) in hv_need_to_signal()
336 ring_info->ring_buffer->interrupt_mask; in hv_ringbuffer_get_debuginfo()
/drivers/media/platform/exynos4-is/
Dmipi-csis.c174 u32 interrupt_mask; member
214 u32 interrupt_mask; member
297 val |= state->interrupt_mask; in s5pcsis_enable_interrupts()
299 val &= ~state->interrupt_mask; in s5pcsis_enable_interrupts()
800 state->interrupt_mask = drv_data->interrupt_mask; in s5pcsis_probe()
1019 .interrupt_mask = S5PCSIS_INTMSK_EXYNOS4_EN_ALL,
1023 .interrupt_mask = S5PCSIS_INTMSK_EXYNOS5_EN_ALL,
/drivers/gpu/drm/i915/
Di915_irq.c218 uint32_t interrupt_mask, in ilk_update_display_irq() argument
225 WARN_ON(enabled_irq_mask & ~interrupt_mask); in ilk_update_display_irq()
231 new_val &= ~interrupt_mask; in ilk_update_display_irq()
232 new_val |= (~enabled_irq_mask & interrupt_mask); in ilk_update_display_irq()
260 uint32_t interrupt_mask, in ilk_update_gt_irq() argument
265 WARN_ON(enabled_irq_mask & ~interrupt_mask); in ilk_update_gt_irq()
270 dev_priv->gt_irq_mask &= ~interrupt_mask; in ilk_update_gt_irq()
271 dev_priv->gt_irq_mask |= (~enabled_irq_mask & interrupt_mask); in ilk_update_gt_irq()
308 uint32_t interrupt_mask, in snb_update_pm_irq() argument
313 WARN_ON(enabled_irq_mask & ~interrupt_mask); in snb_update_pm_irq()
[all …]
Di915_drv.h2787 uint32_t interrupt_mask,
/drivers/scsi/isci/
Dhost.c212 writel(0xFF000000, &ihost->smu_registers->interrupt_mask); in sci_controller_isr()
213 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_isr()
251 writel(0xff, &ihost->smu_registers->interrupt_mask); in sci_controller_error_isr()
252 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_error_isr()
605 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_error_handler()
707 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_enable_interrupts()
713 writel(0xffffffff, &ihost->smu_registers->interrupt_mask); in sci_controller_disable_interrupts()
714 readl(&ihost->smu_registers->interrupt_mask); /* flush */ in sci_controller_disable_interrupts()
1076 writel(0xFF000000, &ihost->smu_registers->interrupt_mask); in sci_controller_completion_handler()
1077 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_completion_handler()
Dregisters.h969 u32 interrupt_mask; member
/drivers/pinctrl/
Dpinctrl-amd.c183 char *interrupt_mask; in amd_gpio_dbg_show() local
246 interrupt_mask = in amd_gpio_dbg_show()
249 interrupt_mask = in amd_gpio_dbg_show()
303 interrupt_mask, wake_cntrl0, wake_cntrl1, in amd_gpio_dbg_show()