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Searched refs:isac (Results 1 – 25 of 36) sorted by relevance

12

/drivers/isdn/hisax/
Dhisax_isac.c243 static inline void D_L1L2(struct isac *isac, int pr, void *arg) in D_L1L2() argument
245 struct hisax_if *ifc = (struct hisax_if *) &isac->hisax_d_if; in D_L1L2()
251 static void ph_command(struct isac *isac, unsigned int command) in ph_command() argument
254 switch (isac->type) { in ph_command()
256 isac->write_isac(isac, ISAC_CIX0, (command << 2) | 3); in ph_command()
259 isac->write_isac(isac, ISACSX_CIX0, (command << 4) | (7 << 1)); in ph_command()
268 struct isac *isac = fi->userdata; in l1_di() local
271 ph_command(isac, ISAC_CMD_DI); in l1_di()
276 struct isac *isac = fi->userdata; in l1_di_deact_ind() local
279 D_L1L2(isac, PH_DEACTIVATE | INDICATION, NULL); in l1_di_deact_ind()
[all …]
Darcofi.c24 del_timer(&cs->dc.isac.arcofitimer); in add_arcofi_timer()
26 init_timer(&cs->dc.isac.arcofitimer); in add_arcofi_timer()
27 cs->dc.isac.arcofitimer.expires = jiffies + ((ARCOFI_TIMER_VALUE * HZ) / 1000); in add_arcofi_timer()
28 add_timer(&cs->dc.isac.arcofitimer); in add_arcofi_timer()
34 cs->dc.isac.mon_txp = 0; in send_arcofi()
35 cs->dc.isac.mon_txc = cs->dc.isac.arcofi_list->len; in send_arcofi()
36 memcpy(cs->dc.isac.mon_tx, cs->dc.isac.arcofi_list->msg, cs->dc.isac.mon_txc); in send_arcofi()
37 switch (cs->dc.isac.arcofi_bc) { in send_arcofi()
39 case 1: cs->dc.isac.mon_tx[1] |= 0x40; in send_arcofi()
43 cs->dc.isac.mocr &= 0x0f; in send_arcofi()
[all …]
Disac.c51 switch (cs->dc.isac.ph_state) { in isac_new_ph()
266 cs->dc.isac.ph_state = (exval >> 2) & 0xf; in isac_interrupt()
268 debugl1(cs, "ph_state change %x", cs->dc.isac.ph_state); in isac_interrupt()
315 if (!cs->dc.isac.mon_rx) { in isac_interrupt()
316 if (!(cs->dc.isac.mon_rx = kmalloc(MAX_MON_FRAME, GFP_ATOMIC))) { in isac_interrupt()
319 cs->dc.isac.mocr &= 0xf0; in isac_interrupt()
320 cs->dc.isac.mocr |= 0x0a; in isac_interrupt()
321 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); in isac_interrupt()
324 cs->dc.isac.mon_rxp = 0; in isac_interrupt()
326 if (cs->dc.isac.mon_rxp >= MAX_MON_FRAME) { in isac_interrupt()
[all …]
Dhisax_isac.h13 struct isac { struct
30 u_char (*read_isac) (struct isac *, u_char); argument
31 void (*write_isac) (struct isac *, u_char, u_char); argument
32 void (*read_isac_fifo) (struct isac *, u_char *, int); argument
33 void (*write_isac_fifo)(struct isac *, u_char *, int); argument
36 void isac_init(struct isac *isac);
39 void isac_setup(struct isac *isac);
40 void isac_irq(struct isac *isac);
42 void isacsx_setup(struct isac *isac);
43 void isacsx_irq(struct isac *isac);
DMakefile30 hisax-$(CONFIG_HISAX_16_0) += teles0.o isac.o arcofi.o hscx.o
31 hisax-$(CONFIG_HISAX_16_3) += teles3.o isac.o arcofi.o hscx.o
32 hisax-$(CONFIG_HISAX_TELESPCI) += telespci.o isac.o arcofi.o hscx.o
33 hisax-$(CONFIG_HISAX_S0BOX) += s0box.o isac.o arcofi.o hscx.o
34 hisax-$(CONFIG_HISAX_AVM_A1) += avm_a1.o isac.o arcofi.o hscx.o
35 hisax-$(CONFIG_HISAX_AVM_A1_PCMCIA) += avm_a1p.o isac.o arcofi.o hscx.o
36 hisax-$(CONFIG_HISAX_FRITZPCI) += avm_pci.o isac.o arcofi.o
37 hisax-$(CONFIG_HISAX_ELSA) += elsa.o isac.o arcofi.o hscx.o
38 hisax-$(CONFIG_HISAX_IX1MICROR2) += ix1_micro.o isac.o arcofi.o hscx.o
39 hisax-$(CONFIG_HISAX_DIEHLDIVA) += diva.o isac.o arcofi.o hscx.o ipacx.o
[all …]
Dhisax_fcpcipnp.c153 static unsigned char fcpci_read_isac(struct isac *isac, unsigned char offset) in fcpci_read_isac() argument
155 struct fritz_adapter *adapter = isac->priv; in fcpci_read_isac()
170 static void fcpci_write_isac(struct isac *isac, unsigned char offset, in fcpci_write_isac() argument
173 struct fritz_adapter *adapter = isac->priv; in fcpci_write_isac()
186 static void fcpci_read_isac_fifo(struct isac *isac, unsigned char *data, in fcpci_read_isac_fifo() argument
189 struct fritz_adapter *adapter = isac->priv; in fcpci_read_isac_fifo()
198 static void fcpci_write_isac_fifo(struct isac *isac, unsigned char *data, in fcpci_write_isac_fifo() argument
201 struct fritz_adapter *adapter = isac->priv; in fcpci_write_isac_fifo()
248 static unsigned char fcpci2_read_isac(struct isac *isac, unsigned char offset) in fcpci2_read_isac() argument
250 struct fritz_adapter *adapter = isac->priv; in fcpci2_read_isac()
[all …]
Dasuscom.c80 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset)); in ReadISAC()
86 writereg(cs->hw.asus.adr, cs->hw.asus.isac, offset, value); in WriteISAC()
92 readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size); in ReadISACfifo()
98 writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size); in WriteISACfifo()
104 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset | 0x80)); in ReadISAC_IPAC()
110 writereg(cs->hw.asus.adr, cs->hw.asus.isac, offset | 0x80, value); in WriteISAC_IPAC()
116 readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size); in ReadISACfifo_IPAC()
122 writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size); in WriteISACfifo_IPAC()
168 val = readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA); in asuscom_interrupt()
178 val = readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA); in asuscom_interrupt()
[all …]
Dniccy.c80 return readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset); in ReadISAC()
85 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset, value); in WriteISAC()
90 readfifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size); in ReadISACfifo()
95 writefifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size); in WriteISACfifo()
145 val = readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_ISTA); in niccy_interrupt()
156 val = readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_ISTA); in niccy_interrupt()
165 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0xFF); in niccy_interrupt()
166 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0); in niccy_interrupt()
182 release_region(cs->hw.niccy.isac, 4); in release_io_niccy()
184 release_region(cs->hw.niccy.isac, 2); in release_io_niccy()
[all …]
Delsa.c178 return (readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset)); in ReadISAC()
184 writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset, value); in WriteISAC()
190 readfifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0, data, size); in ReadISACfifo()
196 writefifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0, data, size); in WriteISACfifo()
202 return (readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset + 0x80)); in ReadISAC_IPAC()
208 writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset | 0x80, value); in WriteISAC_IPAC()
214 readfifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0x80, data, size); in ReadISACfifo_IPAC()
220 writefifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0x80, data, size); in WriteISACfifo_IPAC()
312 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, ISAC_ISTA); in elsa_interrupt()
324 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, ISAC_ISTA); in elsa_interrupt()
[all …]
Dsedlbauer.c156 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset)); in ReadISAC()
162 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset, value); in WriteISAC()
168 readfifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0, data, size); in ReadISACfifo()
174 writefifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0, data, size); in WriteISACfifo()
180 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset | 0x80)); in ReadISAC_IPAC()
186 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset | 0x80, value); in WriteISAC_IPAC()
192 readfifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0x80, data, size); in ReadISACfifo_IPAC()
198 writefifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0x80, data, size); in WriteISACfifo_IPAC()
280 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_ISTA); in sedlbauer_interrupt()
290 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_ISTA); in sedlbauer_interrupt()
[all …]
Dteles3.c58 return (readreg(cs->hw.teles3.isac, offset)); in ReadISAC()
64 writereg(cs->hw.teles3.isac, offset, value); in WriteISAC()
116 val = readreg(cs->hw.teles3.isac, ISAC_ISTA); in teles3_interrupt()
127 val = readreg(cs->hw.teles3.isac, ISAC_ISTA); in teles3_interrupt()
137 writereg(cs->hw.teles3.isac, ISAC_MASK, 0xFF); in teles3_interrupt()
138 writereg(cs->hw.teles3.isac, ISAC_MASK, 0x0); in teles3_interrupt()
149 release_region(cs->hw.teles3.isac + 32, 32); in release_ioregs()
220 byteout(cs->hw.teles3.isac + 0x3c, 0); in reset_teles3()
222 byteout(cs->hw.teles3.isac + 0x3c, 1); in reset_teles3()
338 cs->hw.teles3.isac = cs->hw.teles3.cfg_reg - 0x420; in setup_teles3()
[all …]
Davm_a1.c58 return (readreg(cs->hw.avm.isac, offset)); in ReadISAC()
64 writereg(cs->hw.avm.isac, offset, value); in WriteISAC()
122 val = readreg(cs->hw.avm.isac, ISAC_ISTA); in avm_a1_interrupt()
129 writereg(cs->hw.avm.isac, ISAC_MASK, 0xFF); in avm_a1_interrupt()
130 writereg(cs->hw.avm.isac, ISAC_MASK, 0x0); in avm_a1_interrupt()
142 release_region(cs->hw.avm.isac + 32, 32); in release_ioregs()
192 cs->hw.avm.isac = card->para[1] + 0x1400 - 0x20; in setup_avm_a1()
206 if (!request_region(cs->hw.avm.isac + 32, 32, "HiSax isac")) { in setup_avm_a1()
209 cs->hw.avm.isac + 32, in setup_avm_a1()
210 cs->hw.avm.isac + 64); in setup_avm_a1()
[all …]
Dmic.c68 return (readreg(cs->hw.mic.adr, cs->hw.mic.isac, offset)); in ReadISAC()
74 writereg(cs->hw.mic.adr, cs->hw.mic.isac, offset, value); in WriteISAC()
80 readfifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size); in ReadISACfifo()
86 writefifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size); in WriteISACfifo()
132 val = readreg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_ISTA); in mic_interrupt()
142 val = readreg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_ISTA); in mic_interrupt()
150 writereg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_MASK, 0xFF); in mic_interrupt()
151 writereg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_MASK, 0x0); in mic_interrupt()
205 cs->hw.mic.isac = cs->hw.mic.cfg_reg + MIC_ISAC; in setup_mic()
Disurf.c39 return (readb(cs->hw.isurf.isac + offset)); in ReadISAC()
45 writeb(value, cs->hw.isurf.isac + offset); mb(); in WriteISAC()
53 data[i] = readb(cs->hw.isurf.isac); in ReadISACfifo()
61 writeb(data[i], cs->hw.isurf.isac); mb(); in WriteISACfifo()
96 val = readb(cs->hw.isurf.isac + ISAC_ISTA); in isurf_interrupt()
106 val = readb(cs->hw.isurf.isac + ISAC_ISTA); in isurf_interrupt()
116 writeb(0xFF, cs->hw.isurf.isac + ISAC_MASK); mb(); in isurf_interrupt()
117 writeb(0, cs->hw.isurf.isac + ISAC_MASK); mb(); in isurf_interrupt()
275 cs->hw.isurf.isac = cs->hw.isurf.isar + ISURF_ISAC_OFFSET; in setup_isurf()
Ds0box.c98 return (readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, offset)); in ReadISAC()
104 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, offset, value); in WriteISAC()
156 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, ISAC_ISTA); in s0box_interrupt()
167 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, ISAC_ISTA); in s0box_interrupt()
177 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, ISAC_MASK, 0xFF); in s0box_interrupt()
178 writereg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, ISAC_MASK, 0x0); in s0box_interrupt()
226 cs->hw.teles3.isac = 0x20; in setup_s0box()
227 cs->hw.teles3.isacfifo = cs->hw.teles3.isac + 0x3e; in setup_s0box()
239 cs->hw.teles3.isac, cs->hw.teles3.cfg_reg); in setup_s0box()
Dix1_micro.c78 return (readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, offset)); in ReadISAC()
84 writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, offset, value); in WriteISAC()
90 readfifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size); in ReadISACfifo()
96 writefifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size); in WriteISACfifo()
138 val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA); in ix1micro_interrupt()
148 val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA); in ix1micro_interrupt()
156 writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_MASK, 0xFF); in ix1micro_interrupt()
157 writereg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_MASK, 0); in ix1micro_interrupt()
282 cs->hw.ix1.isac = card->para[1] + ISAC_DATA_OFFSET; in setup_ix1micro()
Dsaphir.c70 return (readreg(cs->hw.saphir.ale, cs->hw.saphir.isac, offset)); in ReadISAC()
76 writereg(cs->hw.saphir.ale, cs->hw.saphir.isac, offset, value); in WriteISAC()
82 readfifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size); in ReadISACfifo()
88 writefifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size); in WriteISACfifo()
130 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.isac, ISAC_ISTA); in saphir_interrupt()
140 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.isac, ISAC_ISTA); in saphir_interrupt()
153 writereg(cs->hw.saphir.ale, cs->hw.saphir.isac, ISAC_MASK, 0xFF); in saphir_interrupt()
154 writereg(cs->hw.saphir.ale, cs->hw.saphir.isac, ISAC_MASK, 0); in saphir_interrupt()
255 cs->hw.saphir.isac = card->para[1] + ISAC_DATA; in setup_saphir()
Ddiva.c134 return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset)); in ReadISAC()
140 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset, value); in WriteISAC()
146 readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size); in ReadISACfifo()
152 writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size); in WriteISACfifo()
158 return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset + 0x80)); in ReadISAC_IPAC()
164 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset | 0x80, value); in WriteISAC_IPAC()
170 readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size); in ReadISACfifo_IPAC()
176 writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size); in WriteISACfifo_IPAC()
302 val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_ISTA); in diva_interrupt()
311 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_MASK, 0xFF); in diva_interrupt()
[all …]
Dhisax.h558 unsigned int isac; member
583 signed int isac; member
597 unsigned int isac; member
608 unsigned int isac; member
618 unsigned int isac; member
630 unsigned int isac; member
650 unsigned int isac; member
662 unsigned int isac; member
670 unsigned int isac; member
676 unsigned int isac; member
[all …]
Denternow_pci.c101 return (inb(cs->hw.njet.isac + 4 * offset)); in ReadByteAmd7930()
105 outb(offset, cs->hw.njet.isac + 4 * AMD_CR); in ReadByteAmd7930()
106 return (inb(cs->hw.njet.isac + 4 * AMD_DR)); in ReadByteAmd7930()
116 outb(value, cs->hw.njet.isac + 4 * offset); in WriteByteAmd7930()
120 outb(offset, cs->hw.njet.isac + 4 * AMD_CR); in WriteByteAmd7930()
121 outb(value, cs->hw.njet.isac + 4 * AMD_DR); in WriteByteAmd7930()
331 cs->hw.njet.isac = cs->hw.njet.base + 0xC0; // Fenster zum AMD in en_cs_init()
/drivers/isdn/hardware/mISDN/
DmISDNipac.c47 ph_command(struct isac_hw *isac, u8 command) in ph_command() argument
49 pr_debug("%s: ph_command %x\n", isac->name, command); in ph_command()
50 if (isac->type & IPAC_TYPE_ISACX) in ph_command()
51 WriteISAC(isac, ISACX_CIX0, (command << 4) | 0xE); in ph_command()
53 WriteISAC(isac, ISAC_CIX0, (command << 2) | 3); in ph_command()
57 isac_ph_state_change(struct isac_hw *isac) in isac_ph_state_change() argument
59 switch (isac->state) { in isac_ph_state_change()
62 ph_command(isac, ISAC_CMD_DUI); in isac_ph_state_change()
64 schedule_event(&isac->dch, FLG_PHCHANGE); in isac_ph_state_change()
70 struct isac_hw *isac = container_of(dch, struct isac_hw, dch); in isac_ph_state_bh() local
[all …]
DmISDNinfineon.c116 struct _ioaddr isac; member
241 card->ipac.isac.dch.debug = debug; in _set_debug()
272 IOFUNC_IO(ISAC, inf_hw, isac.a.io)
274 IOFUNC_IND(ISAC, inf_hw, isac.a.io)
276 IOFUNC_MEMIO(ISAC, inf_hw, u32, isac.a.p)
565 hw->ipac.isac.adf2 = 0x87; in reset_inf()
737 hw->isac.mode = hw->cfg.mode; in setup_io()
738 hw->isac.a.io.ale = (u32)hw->cfg.start + DIVA_ISAC_ALE; in setup_io()
739 hw->isac.a.io.port = (u32)hw->cfg.start + DIVA_ISAC_PORT; in setup_io()
746 hw->ipac.isac.off = 0x80; in setup_io()
[all …]
Dspeedfax.c81 struct isac_hw isac; member
91 card->isac.dch.debug = debug; in _set_debug()
144 mISDNisac_irq(&sf->isac, val); in IOFUNC_IND()
235 ret = sf->isac.ctrl(&sf->isac, HW_TESTLOOP, cq->channel); in channel_ctrl()
238 ret = sf->isac.ctrl(&sf->isac, HW_TIMER3_VALUE, cq->p1); in channel_ctrl()
262 err = sf->isac.open(&sf->isac, rq); in sfax_dctrl()
298 ret = sf->isac.init(&sf->isac); in init_card()
339 sf->isac.type = IPAC_TYPE_ISAC; in setup_speedfax()
344 ASSIGN_FUNC(IND, ISAC, sf->isac); in setup_speedfax()
360 card->isac.release(&card->isac); in release_card()
[all …]
Davmfritz.c141 struct isac_hw isac; member
153 card->isac.dch.debug = debug; in _set_debug()
651 mISDNisac_irq(&fc->isac, val); in avm_fritz_interrupt()
680 mISDNisac_irq(&fc->isac, val); in avm_fritzv2_interrupt()
807 ret = fc->isac.init(&fc->isac); in init_card()
894 ret = fc->isac.ctrl(&fc->isac, HW_TESTLOOP, cq->channel); in channel_ctrl()
897 ret = fc->isac.ctrl(&fc->isac, HW_TIMER3_VALUE, cq->p1); in channel_ctrl()
941 err = fc->isac.open(&fc->isac, rq); in avm_dctrl()
986 ASSIGN_FUNC(V1, ISAC, fc->isac); in setup_fritz()
987 fc->isac.type = IPAC_TYPE_ISAC; in setup_fritz()
[all …]
Dnetjet.c88 struct isac_hw isac; member
108 card->isac.dch.debug = debug; in _set_debug()
707 mISDNisac_irq(&card->isac, val); in nj_irq()
849 ret = card->isac.ctrl(&card->isac, HW_TESTLOOP, cq->channel); in channel_ctrl()
852 ret = card->isac.ctrl(&card->isac, HW_TIMER3_VALUE, cq->p1); in channel_ctrl()
897 err = card->isac.open(&card->isac, rq); in nj_dctrl()
941 ret = card->isac.init(&card->isac); in nj_init_card()
967 card->isac.release(&card->isac); in nj_release()
973 if (card->isac.dch.dev.dev.class) in nj_release()
974 mISDN_unregister_device(&card->isac.dch.dev); in nj_release()
[all …]

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