| /drivers/clk/bcm/ |
| D | clk-kona-setup.c | 29 u32 limit; in ccu_data_offsets_valid() local
31 limit = ccu->range - sizeof(u32); in ccu_data_offsets_valid()
32 limit = round_down(limit, sizeof(u32)); in ccu_data_offsets_valid()
34 if (ccu_policy->enable.offset > limit) { in ccu_data_offsets_valid()
37 ccu->name, ccu_policy->enable.offset, limit); in ccu_data_offsets_valid()
40 if (ccu_policy->control.offset > limit) { in ccu_data_offsets_valid()
43 ccu->name, ccu_policy->control.offset, limit); in ccu_data_offsets_valid()
88 u32 limit; in peri_clk_data_offsets_valid() local
95 limit = range - sizeof(u32); in peri_clk_data_offsets_valid()
96 limit = round_down(limit, sizeof(u32)); in peri_clk_data_offsets_valid()
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| /drivers/net/ethernet/stmicro/stmmac/ |
| D | stmmac_hwtstamp.c | 56 int limit; in stmmac_init_systime() local
67 limit = 10; in stmmac_init_systime()
68 while (limit--) { in stmmac_init_systime()
73 if (limit < 0) in stmmac_init_systime()
82 int limit; in stmmac_config_addend() local
91 limit = 10; in stmmac_config_addend()
92 while (limit--) { in stmmac_config_addend()
97 if (limit < 0) in stmmac_config_addend()
107 int limit; in stmmac_adjust_systime() local
118 limit = 10; in stmmac_adjust_systime()
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| /drivers/gpu/drm/gma500/ |
| D | oaktrail_crtc.c | 46 static bool mrst_lvds_find_best_pll(const struct gma_limit_t *limit,
50 static bool mrst_sdvo_find_best_pll(const struct gma_limit_t *limit,
93 const struct gma_limit_t *limit = NULL; in mrst_limit() local
101 limit = &mrst_limits[MRST_LIMIT_LVDS_100L]; in mrst_limit()
104 limit = &mrst_limits[MRST_LIMIT_LVDS_83]; in mrst_limit()
107 limit = &mrst_limits[MRST_LIMIT_LVDS_100]; in mrst_limit()
111 limit = &mrst_limits[MRST_LIMIT_SDVO]; in mrst_limit()
113 limit = NULL; in mrst_limit()
117 return limit; in mrst_limit()
133 static bool mrst_sdvo_find_best_pll(const struct gma_limit_t *limit, in mrst_sdvo_find_best_pll() argument
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| D | gma_display.c | 700 const struct gma_limit_t *limit, in gma_pll_is_valid() argument
703 if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1) in gma_pll_is_valid()
705 if (clock->p < limit->p.min || limit->p.max < clock->p) in gma_pll_is_valid()
707 if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2) in gma_pll_is_valid()
709 if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1) in gma_pll_is_valid()
714 if (clock->m < limit->m.min || limit->m.max < clock->m) in gma_pll_is_valid()
716 if (clock->n < limit->n.min || limit->n.max < clock->n) in gma_pll_is_valid()
718 if (clock->vco < limit->vco.min || limit->vco.max < clock->vco) in gma_pll_is_valid()
724 if (clock->dot < limit->dot.min || limit->dot.max < clock->dot) in gma_pll_is_valid()
730 bool gma_find_best_pll(const struct gma_limit_t *limit, in gma_find_best_pll() argument
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | kv_smc.c | 79 u32 smc_address, u32 limit) in kv_set_smc_sram_address() argument
83 if ((smc_address + 3) > limit) in kv_set_smc_sram_address()
94 u32 *value, u32 limit) in amdgpu_kv_read_smc_sram_dword() argument
98 ret = kv_set_smc_sram_address(adev, smc_address, limit); in amdgpu_kv_read_smc_sram_dword()
124 const u8 *src, u32 byte_count, u32 limit) in amdgpu_kv_copy_bytes_to_smc() argument
129 if ((smc_start_address + byte_count) > limit) in amdgpu_kv_copy_bytes_to_smc()
139 ret = kv_set_smc_sram_address(adev, addr, limit); in amdgpu_kv_copy_bytes_to_smc()
165 ret = kv_set_smc_sram_address(adev, addr, limit); in amdgpu_kv_copy_bytes_to_smc()
178 ret = kv_set_smc_sram_address(adev, addr, limit); in amdgpu_kv_copy_bytes_to_smc()
193 ret = kv_set_smc_sram_address(adev, addr, limit); in amdgpu_kv_copy_bytes_to_smc()
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| D | ci_smc.c | 37 u32 smc_address, u32 limit) in ci_set_smc_sram_address() argument
41 if ((smc_address + 3) > limit) in ci_set_smc_sram_address()
52 const u8 *src, u32 byte_count, u32 limit) in amdgpu_ci_copy_bytes_to_smc() argument
62 if ((smc_start_address + byte_count) > limit) in amdgpu_ci_copy_bytes_to_smc()
72 ret = ci_set_smc_sram_address(adev, addr, limit); in amdgpu_ci_copy_bytes_to_smc()
87 ret = ci_set_smc_sram_address(adev, addr, limit); in amdgpu_ci_copy_bytes_to_smc()
104 ret = ci_set_smc_sram_address(adev, addr, limit); in amdgpu_ci_copy_bytes_to_smc()
208 int amdgpu_ci_load_smc_ucode(struct amdgpu_device *adev, u32 limit) in amdgpu_ci_load_smc_ucode() argument
252 u32 smc_address, u32 *value, u32 limit) in amdgpu_ci_read_smc_sram_dword() argument
258 ret = ci_set_smc_sram_address(adev, smc_address, limit); in amdgpu_ci_read_smc_sram_dword()
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| /drivers/gpu/drm/radeon/ |
| D | kv_smc.c | 76 u32 smc_address, u32 limit) in kv_set_smc_sram_address() argument
80 if ((smc_address + 3) > limit) in kv_set_smc_sram_address()
90 u32 *value, u32 limit) in kv_read_smc_sram_dword() argument
94 ret = kv_set_smc_sram_address(rdev, smc_address, limit); in kv_read_smc_sram_dword()
120 const u8 *src, u32 byte_count, u32 limit) in kv_copy_bytes_to_smc() argument
125 if ((smc_start_address + byte_count) > limit) in kv_copy_bytes_to_smc()
135 ret = kv_set_smc_sram_address(rdev, addr, limit); in kv_copy_bytes_to_smc()
161 ret = kv_set_smc_sram_address(rdev, addr, limit); in kv_copy_bytes_to_smc()
174 ret = kv_set_smc_sram_address(rdev, addr, limit); in kv_copy_bytes_to_smc()
189 ret = kv_set_smc_sram_address(rdev, addr, limit); in kv_copy_bytes_to_smc()
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| D | rv770_smc.c | 278 u16 smc_address, u16 limit) in rv770_set_smc_sram_address() argument
284 if ((smc_address + 3) > limit) in rv770_set_smc_sram_address()
297 u16 byte_count, u16 limit) in rv770_copy_bytes_to_smc() argument
306 if ((smc_start_address + byte_count) > limit) in rv770_copy_bytes_to_smc()
316 ret = rv770_set_smc_sram_address(rdev, addr, limit); in rv770_copy_bytes_to_smc()
331 ret = rv770_set_smc_sram_address(rdev, addr, limit); in rv770_copy_bytes_to_smc()
349 ret = rv770_set_smc_sram_address(rdev, addr, limit); in rv770_copy_bytes_to_smc()
467 static void rv770_clear_smc_sram(struct radeon_device *rdev, u16 limit) in rv770_clear_smc_sram() argument
473 for (i = 0; i < limit; i += 4) { in rv770_clear_smc_sram()
474 rv770_set_smc_sram_address(rdev, i, limit); in rv770_clear_smc_sram()
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| D | ci_smc.c | 34 u32 smc_address, u32 limit) in ci_set_smc_sram_address() argument
38 if ((smc_address + 3) > limit) in ci_set_smc_sram_address()
49 const u8 *src, u32 byte_count, u32 limit) in ci_copy_bytes_to_smc() argument
59 if ((smc_start_address + byte_count) > limit) in ci_copy_bytes_to_smc()
69 ret = ci_set_smc_sram_address(rdev, addr, limit); in ci_copy_bytes_to_smc()
84 ret = ci_set_smc_sram_address(rdev, addr, limit); in ci_copy_bytes_to_smc()
101 ret = ci_set_smc_sram_address(rdev, addr, limit); in ci_copy_bytes_to_smc()
207 int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit) in ci_load_smc_ucode() argument
268 u32 smc_address, u32 *value, u32 limit) in ci_read_smc_sram_dword() argument
274 ret = ci_set_smc_sram_address(rdev, smc_address, limit); in ci_read_smc_sram_dword()
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| D | si_smc.c | 34 u32 smc_address, u32 limit) in si_set_smc_sram_address() argument
38 if ((smc_address + 3) > limit) in si_set_smc_sram_address()
49 const u8 *src, u32 byte_count, u32 limit) in si_copy_bytes_to_smc() argument
57 if ((smc_start_address + byte_count) > limit) in si_copy_bytes_to_smc()
67 ret = si_set_smc_sram_address(rdev, addr, limit); in si_copy_bytes_to_smc()
82 ret = si_set_smc_sram_address(rdev, addr, limit); in si_copy_bytes_to_smc()
100 ret = si_set_smc_sram_address(rdev, addr, limit); in si_copy_bytes_to_smc()
211 int si_load_smc_ucode(struct radeon_device *rdev, u32 limit) in si_load_smc_ucode() argument
283 u32 *value, u32 limit) in si_read_smc_sram_dword() argument
289 ret = si_set_smc_sram_address(rdev, smc_address, limit); in si_read_smc_sram_dword()
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| /drivers/net/wireless/ath/ath9k/ |
| D | calib.c | 50 struct ath_nf_limits *limit; in ath9k_hw_get_nf_limits() local
53 limit = &ah->nf_2g; in ath9k_hw_get_nf_limits()
55 limit = &ah->nf_5g; in ath9k_hw_get_nf_limits()
57 return limit; in ath9k_hw_get_nf_limits()
86 struct ath_nf_limits *limit; in ath9k_hw_update_nfcal_hist_buffer() local
93 limit = ath9k_hw_get_nf_limits(ah, ah->curchan); in ath9k_hw_update_nfcal_hist_buffer()
116 if (h[i].privNF > limit->max) { in ath9k_hw_update_nfcal_hist_buffer()
121 i, h[i].privNF, limit->max, in ath9k_hw_update_nfcal_hist_buffer()
134 h[i].privNF = limit->max; in ath9k_hw_update_nfcal_hist_buffer()
330 struct ath_nf_limits *limit; in ath9k_hw_nf_sanitize() local
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| /drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| D | shadowacpi.c | 49 u32 limit = (offset + length + 0xfff) & ~0xfff; in acpi_read_fast() local
51 u32 fetch = limit - start; in acpi_read_fast()
53 if (nvbios_extend(bios, limit) >= 0) { in acpi_read_fast()
70 u32 limit = (offset + length + 0xfff) & ~0xfff; in acpi_read_slow() local
74 if (nvbios_extend(bios, limit) >= 0) { in acpi_read_slow()
75 while (start + fetch < limit) { in acpi_read_slow()
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| /drivers/gpu/drm/nouveau/nvkm/subdev/bar/ |
| D | nv50.c | 67 u64 start, limit; in nv50_bar_oneinit() local
85 limit = start + device->func->resource_size(device, 3); in nv50_bar_oneinit()
87 ret = nvkm_vm_new(device, start, limit, start, &bar3_lock, &vm); in nv50_bar_oneinit()
93 ret = nvkm_vm_boot(vm, limit-- - start); in nv50_bar_oneinit()
108 nvkm_wo32(bar->bar3, 0x04, lower_32_bits(limit)); in nv50_bar_oneinit()
110 nvkm_wo32(bar->bar3, 0x0c, upper_32_bits(limit) << 24 | in nv50_bar_oneinit()
118 limit = start + device->func->resource_size(device, 1); in nv50_bar_oneinit()
120 ret = nvkm_vm_new(device, start, limit--, start, &bar1_lock, &vm); in nv50_bar_oneinit()
137 nvkm_wo32(bar->bar1, 0x04, lower_32_bits(limit)); in nv50_bar_oneinit()
139 nvkm_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 | in nv50_bar_oneinit()
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| /drivers/gpu/drm/nouveau/ |
| D | nouveau_chan.c | 141 args.limit = cli->vm->mmu->limit - 1; in nouveau_channel_prep()
153 args.limit = args.start + device->info.ram_user - 1; in nouveau_channel_prep()
158 args.limit = device->info.ram_user - 1; in nouveau_channel_prep()
165 args.limit = chan->drm->agp.base + in nouveau_channel_prep()
171 args.limit = mmu->limit - 1; in nouveau_channel_prep()
309 args.limit = cli->vm->mmu->limit - 1; in nouveau_channel_init()
314 args.limit = device->info.ram_user - 1; in nouveau_channel_init()
326 args.limit = cli->vm->mmu->limit - 1; in nouveau_channel_init()
332 args.limit = chan->drm->agp.base + in nouveau_channel_init()
338 args.limit = mmu->limit - 1; in nouveau_channel_init()
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| D | nv50_fence.c | 42 u32 limit = start + mem->size - 1; in nv50_fence_context_new() local
59 .limit = limit, in nv50_fence_context_new()
67 u32 limit = start + bo->bo.mem.size - 1; in nv50_fence_context_new() local
74 .limit = limit, in nv50_fence_context_new()
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| /drivers/infiniband/hw/qib/ |
| D | qib_diag.c | 344 u32 limit; in qib_read_umem64() local
347 reg_addr = (const u64 __iomem *)qib_remap_ioaddr32(dd, regoffs, &limit); in qib_read_umem64()
348 if (reg_addr == NULL || limit == 0 || !(dd->flags & QIB_PRESENT)) { in qib_read_umem64()
352 if (count >= limit) in qib_read_umem64()
353 count = limit; in qib_read_umem64()
388 u32 limit; in qib_write_umem64() local
391 reg_addr = (u64 __iomem *)qib_remap_ioaddr32(dd, regoffs, &limit); in qib_write_umem64()
392 if (reg_addr == NULL || limit == 0 || !(dd->flags & QIB_PRESENT)) { in qib_write_umem64()
396 if (count >= limit) in qib_write_umem64()
397 count = limit; in qib_write_umem64()
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| /drivers/tty/serial/ |
| D | sunhv.c | 77 int limit = 10000; in receive_chars_getchar() local
79 while (limit-- > 0) { in receive_chars_getchar()
120 int limit = 10000; in receive_chars_read() local
122 while (limit-- > 0) { in receive_chars_read()
270 int limit = 10000; in sunhv_send_xchar() local
277 while (limit-- > 0) { in sunhv_send_xchar()
297 int limit = 10000; in sunhv_break_ctl() local
301 while (limit-- > 0) { in sunhv_break_ctl()
455 int limit = 1000000; in sunhv_console_write_paged() local
457 while (limit--) { in sunhv_console_write_paged()
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| /drivers/usb/mon/ |
| D | mon_text.c | 98 int cnt, limit; member
410 ptr.limit = rp->printf_size; in mon_text_read_t()
414 ptr.cnt += snprintf(ptr.pbuf + ptr.cnt, ptr.limit - ptr.cnt, in mon_text_read_t()
449 ptr.limit = rp->printf_size; in mon_text_read_u()
462 ptr.cnt += snprintf(ptr.pbuf + ptr.cnt, ptr.limit - ptr.cnt, in mon_text_read_u()
520 p->cnt += snprintf(p->pbuf + p->cnt, p->limit - p->cnt, in mon_text_read_head_t()
538 p->cnt += snprintf(p->pbuf + p->cnt, p->limit - p->cnt, in mon_text_read_head_u()
549 p->cnt += snprintf(p->pbuf + p->cnt, p->limit - p->cnt, in mon_text_read_statset()
557 p->cnt += snprintf(p->pbuf + p->cnt, p->limit - p->cnt, in mon_text_read_statset()
560 p->cnt += snprintf(p->pbuf + p->cnt, p->limit - p->cnt, in mon_text_read_statset()
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| /drivers/isdn/gigaset/ |
| D | isocdata.c | 136 int read, write, limit, src, dst; in gigaset_isowbuf_getbytes() local
147 limit = read + size; in gigaset_isowbuf_getbytes()
149 __func__, read, write, limit); in gigaset_isowbuf_getbytes()
159 if (limit >= write) { in gigaset_isowbuf_getbytes()
165 if (limit >= write) { in gigaset_isowbuf_getbytes()
168 limit = write + BAS_OUTBUFPAD; in gigaset_isowbuf_getbytes()
171 __func__, write, limit, iwb->idle); in gigaset_isowbuf_getbytes()
180 limit = 0; in gigaset_isowbuf_getbytes()
184 __func__, pbyte, limit); in gigaset_isowbuf_getbytes()
185 iwb->data[limit] = pbyte; /* restore in gigaset_isowbuf_getbytes()
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| /drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | nv44.c | 45 nvkm_wr32(device, NV20_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
54 nvkm_wr32(device, NV47_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
57 nvkm_wr32(device, NV40_PGRAPH_TLIMIT1(i), tile->limit); in nv44_gr_tile()
62 nvkm_wr32(device, NV20_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
65 nvkm_wr32(device, NV40_PGRAPH_TLIMIT1(i), tile->limit); in nv44_gr_tile()
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| /drivers/staging/rtl8712/ |
| D | ieee80211.c | 114 u8 *r8712_get_ie(u8 *pbuf, sint index, sint *len, sint limit) in r8712_get_ie() argument
119 if (limit < 1) in r8712_get_ie()
132 if (i >= limit) in r8712_get_ie()
216 unsigned char *r8712_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit) in r8712_get_wpa_ie() argument
224 pbuf = r8712_get_ie(pbuf, _WPA_IE_ID_, &len, limit); in r8712_get_wpa_ie()
241 limit = limit - (pbuf - pie) - 2 - len; in r8712_get_wpa_ie()
242 if (limit <= 0) in r8712_get_wpa_ie()
250 unsigned char *r8712_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit) in r8712_get_wpa2_ie() argument
252 return r8712_get_ie(pie, _WPA2_IE_ID_, rsn_ie_len, limit); in r8712_get_wpa2_ie()
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| /drivers/usb/host/ |
| D | xhci-ext-caps.h | 145 int limit = XHCI_MAX_EXT_CAPS; in xhci_find_ext_cap_by_id() local
147 while (ext_offset && limit > 0) { in xhci_find_ext_cap_by_id()
152 limit--; in xhci_find_ext_cap_by_id()
154 if (limit > 0) in xhci_find_ext_cap_by_id()
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| /drivers/scsi/be2iscsi/ |
| D | be.h | 48 static inline u32 MODULO(u16 val, u16 limit) in MODULO() argument
50 WARN_ON(limit & (limit - 1)); in MODULO()
51 return val & (limit - 1); in MODULO()
54 static inline void index_inc(u16 *index, u16 limit) in index_inc() argument
56 *index = MODULO((*index + 1), limit); in index_inc()
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| /drivers/base/ |
| D | dma-contiguous.c | 107 void __init dma_contiguous_reserve(phys_addr_t limit) in dma_contiguous_reserve() argument
111 phys_addr_t selected_limit = limit; in dma_contiguous_reserve()
114 pr_debug("%s(limit %08lx)\n", __func__, (unsigned long)limit); in dma_contiguous_reserve()
119 selected_limit = min_not_zero(limit_cmdline, limit); in dma_contiguous_reserve()
163 phys_addr_t limit, struct cma **res_cma, in dma_contiguous_reserve_area() argument
168 ret = cma_declare_contiguous(base, size, limit, 0, 0, fixed, res_cma); in dma_contiguous_reserve_area()
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| /drivers/gpu/drm/exynos/ |
| D | exynos_drm_rotator.c | 171 struct rot_limit *limit; in rotator_align_size() local
176 limit = &limit_tbl->rgb888; in rotator_align_size()
178 limit = &limit_tbl->ycbcr420_2p; in rotator_align_size()
181 mask = ~((1 << limit->align) - 1); in rotator_align_size()
184 val = ROT_ALIGN(*hsize, limit->align, mask); in rotator_align_size()
185 if (val < limit->min_w) in rotator_align_size()
186 *hsize = ROT_MIN(limit->min_w, mask); in rotator_align_size()
187 else if (val > limit->max_w) in rotator_align_size()
188 *hsize = ROT_MAX(limit->max_w, mask); in rotator_align_size()
193 val = ROT_ALIGN(*vsize, limit->align, mask); in rotator_align_size()
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