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Searched refs:max_sclk (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/radeon/
Dbtc_dpm.h42 const u32 max_sclk, const u32 max_mclk,
Dbtc_dpm.c1236 u32 max_sclk, u32 requested_sclk) in btc_get_valid_sclk() argument
1239 max_sclk, requested_sclk); in btc_get_valid_sclk()
1243 const u32 max_sclk, const u32 max_mclk, in btc_skip_blacklist_clocks() argument
1261 *sclk = btc_get_valid_sclk(rdev, max_sclk, *sclk + 1); in btc_skip_blacklist_clocks()
1263 if (*sclk < max_sclk) in btc_skip_blacklist_clocks()
1264 btc_skip_blacklist_clocks(rdev, max_sclk, max_mclk, sclk, mclk); in btc_skip_blacklist_clocks()
Dsi_dpm.c2295 u32 max_sclk; in si_populate_power_containment_values() local
2324 max_sclk = state->performance_levels[i].sclk; in si_populate_power_containment_values()
2330 if (prev_sclk > max_sclk) in si_populate_power_containment_values()
2334 (prev_sclk == max_sclk) || in si_populate_power_containment_values()
2336 min_sclk = max_sclk; in si_populate_power_containment_values()
2370 …te->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in si_populate_power_containment_values()
2921 u32 max_sclk; member
2999 u32 max_sclk = 0, max_mclk = 0; in si_apply_state_adjust_rules() local
3020 max_sclk = 75000; in si_apply_state_adjust_rules()
3030 max_sclk = 75000; in si_apply_state_adjust_rules()
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Dni_dpm.c2459 u32 max_sclk; in ni_populate_power_containment_values() local
2503 max_sclk = state->performance_levels[i].sclk; in ni_populate_power_containment_values()
2507 if (max_sclk < prev_sclk) in ni_populate_power_containment_values()
2510 if ((max_ps_percent == 0) || (prev_sclk == max_sclk) || eg_pi->uvd_enabled) in ni_populate_power_containment_values()
2511 min_sclk = max_sclk; in ni_populate_power_containment_values()
2524 (u8)((NISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / max_sclk); in ni_populate_power_containment_values()