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Searched refs:mmSDMA0_GFX_APE1_CNTL (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h207 #define mmSDMA0_GFX_APE1_CNTL 0x34a8 macro
Doss_3_0_1_d.h235 #define mmSDMA0_GFX_APE1_CNTL 0x34a8 macro
Doss_3_0_d.h360 #define mmSDMA0_GFX_APE1_CNTL 0x34a8 macro
Doss_2_0_d.h266 #define mmSDMA0_GFX_APE1_CNTL 0x34a8 macro
/drivers/gpu/drm/amd/amdgpu/
Dcik_sdma.c415 WREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i], 0); in cik_sdma_gfx_resume()
1110 RREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i])); in cik_sdma_print_status()
Dsdma_v2_4.c457 WREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i], 0); in sdma_v2_4_gfx_resume()
1121 i, RREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i])); in sdma_v2_4_print_status()
Dsdma_v3_0.c594 WREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i], 0); in sdma_v3_0_gfx_resume()
1283 i, RREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i])); in sdma_v3_0_print_status()