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Searched refs:mmUVD_MPC_SET_MUX (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_d.h57 #define mmUVD_MPC_SET_MUX 0x3d7d macro
Duvd_6_0_d.h64 #define mmUVD_MPC_SET_MUX 0x3d7d macro
Duvd_5_0_d.h63 #define mmUVD_MPC_SET_MUX 0x3d7d macro
/drivers/gpu/drm/amd/amdgpu/
Duvd_v5_0.c347 WREG32(mmUVD_MPC_SET_MUX, 0x88); in uvd_v5_0_start()
705 RREG32(mmUVD_MPC_SET_MUX)); in uvd_v5_0_print_status()
Duvd_v6_0.c345 WREG32(mmUVD_MPC_SET_MUX, 0x88); in uvd_v6_0_start()
697 RREG32(mmUVD_MPC_SET_MUX)); in uvd_v6_0_print_status()
Duvd_v4_2.c312 WREG32(mmUVD_MPC_SET_MUX, 0x88); in uvd_v4_2_start()
762 RREG32(mmUVD_MPC_SET_MUX)); in uvd_v4_2_print_status()