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Searched refs:mmUVD_MPC_SET_MUXB1 (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_d.h56 #define mmUVD_MPC_SET_MUXB1 0x3d7c macro
Duvd_6_0_d.h63 #define mmUVD_MPC_SET_MUXB1 0x3d7c macro
Duvd_5_0_d.h62 #define mmUVD_MPC_SET_MUXB1 0x3d7c macro
/drivers/gpu/drm/amd/amdgpu/
Duvd_v5_0.c345 WREG32(mmUVD_MPC_SET_MUXB1, 0x0); in uvd_v5_0_start()
703 RREG32(mmUVD_MPC_SET_MUXB1)); in uvd_v5_0_print_status()
Duvd_v6_0.c343 WREG32(mmUVD_MPC_SET_MUXB1, 0x0); in uvd_v6_0_start()
695 RREG32(mmUVD_MPC_SET_MUXB1)); in uvd_v6_0_print_status()
Duvd_v4_2.c310 WREG32(mmUVD_MPC_SET_MUXB1, 0x0); in uvd_v4_2_start()
760 RREG32(mmUVD_MPC_SET_MUXB1)); in uvd_v4_2_print_status()