Searched refs:mmUVD_SEMA_ADDR_LOW (Results 1 – 6 of 6) sorted by relevance
27 #define mmUVD_SEMA_ADDR_LOW 0x3bc0 macro
500 amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_ADDR_LOW, 0)); in uvd_v5_0_ring_emit_semaphore()653 RREG32(mmUVD_SEMA_ADDR_LOW)); in uvd_v5_0_print_status()
500 amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_ADDR_LOW, 0)); in uvd_v6_0_ring_emit_semaphore()645 RREG32(mmUVD_SEMA_ADDR_LOW)); in uvd_v6_0_print_status()
456 amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_ADDR_LOW, 0)); in uvd_v4_2_ring_emit_semaphore()710 RREG32(mmUVD_SEMA_ADDR_LOW)); in uvd_v4_2_print_status()