Home
last modified time | relevance | path

Searched refs:mmUVD_VCPU_CNTL (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_d.h65 #define mmUVD_VCPU_CNTL 0x3d98 macro
Duvd_6_0_d.h72 #define mmUVD_VCPU_CNTL 0x3d98 macro
Duvd_5_0_d.h71 #define mmUVD_VCPU_CNTL 0x3d98 macro
/drivers/gpu/drm/amd/amdgpu/
Duvd_v5_0.c354 WREG32(mmUVD_VCPU_CNTL, 1 << 9); in uvd_v5_0_start()
449 WREG32(mmUVD_VCPU_CNTL, 0x0); in uvd_v5_0_stop()
721 RREG32(mmUVD_VCPU_CNTL)); in uvd_v5_0_print_status()
Duvd_v6_0.c352 WREG32(mmUVD_VCPU_CNTL, 1 << 9); in uvd_v6_0_start()
449 WREG32(mmUVD_VCPU_CNTL, 0x0); in uvd_v6_0_stop()
713 RREG32(mmUVD_VCPU_CNTL)); in uvd_v6_0_print_status()
Duvd_v4_2.c319 WREG32(mmUVD_VCPU_CNTL, 1 << 9); in uvd_v4_2_start()
405 WREG32(mmUVD_VCPU_CNTL, 0x0); in uvd_v4_2_stop()
778 RREG32(mmUVD_VCPU_CNTL)); in uvd_v4_2_print_status()